Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors (Record no. 52971)

000 -LEADER
fixed length control field 03233nam a22004935i 4500
001 - CONTROL NUMBER
control field 978-3-319-06340-9
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200420221257.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 140707s2014 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783319063409
-- 978-3-319-06340-9
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Azambuja, Jos�e Rodrigo.
245 10 - TITLE STATEMENT
Title Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors
300 ## - PHYSICAL DESCRIPTION
Number of Pages XVIII, 94 p. 37 illus., 11 illus. in color.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction -- Background -- Fault Tolerance Techniques for Processors -- Proposed Techniques to Detect Transient Faults in Processors -- Simulation Fault Injection Experimental Results -- Configuration Bitstream Fault Injection Experimental Results -- Radiation Experimental Results -- Conclusions and Future Work.
520 ## - SUMMARY, ETC.
Summary, etc This book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors. Coverage begins with an extensive discussion of the current state-of-the-art in fault tolerance techniques. The authors then discuss the best trade-off between software-based and hardware-based techniques and introduce novel hybrid techniques. Proposed techniques increase existing fault detection rates up to 100%, while maintaining low performance overheads in area and application execution time. • Discusses the effects of radiation on modern integrated circuits; • Provides a comprehensive overview of state-of-the art fault tolerance techniques based on software, hardware, and hybrid techniques; • Introduces novel hybrid fault tolerance techniques for reconfigurable FPGAs and ASICs; • Performs fault injection campaigns by simulation, bitstream fault injection, and radiation experiments; • Enables readers to use techniques with lower performance degradation, area occupation, and memory usage.
700 1# - AUTHOR 2
Author 2 Kastensmidt, Fernanda.
700 1# - AUTHOR 2
Author 2 Becker, J�urgen.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-3-319-06340-9
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2014.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microelectronics.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Devices.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics and Microelectronics, Instrumentation.
912 ## -
-- ZDB-2-ENG

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