Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (Record no. 54616)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 04286nam a22006015i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-642-36157-9 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200421111655.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 130107s2013 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783642361579 |
| -- | 978-3-642-36157-9 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 004.24 |
| 245 10 - TITLE STATEMENT | |
| Title | Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation |
| Sub Title | 22nd International Workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4-6, 2012, Revised Selected Papers / |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | IX, 258 p. 150 illus. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Lecture Notes in Computer Science, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Sleep-Transistor Based Power-Gating Tradeoff Analyses -- Modelling and Analysis of Manufacturing Variability Effects from Process to Architectural Level -- Non-invasive Power Simulation at System-Level with SystemC -- A Standard Cell Optimization Method for Near-Threshold Voltage Operations -- An Extended Metastability Simulation Method for Synchronizer Characterization -- Phase Space Based NBTI Model -- Fast Propagation of Hamming and Signal Distances for Register-Transfer Level Datapaths -- Noise Margin Based Library Optimization Considering Variability in Sub-threshold -- TCP Window Based DVFS for Low Power Network Controller SoC -- A Generic Architecture for Robust Asynchronous Communication Links -- Direct Statistical Simulation of Timing Properties in Sequential Circuits -- On-Chip NBTI and PBTI Tracking through an All-Digital Aging Monitor Architecture -- Two-Phase MOBILE Interconnection Schemes for Ultra-Grain Pipeline Applications -- Design of a 150 mV Supply, 2 MIPS, 90nm CMOS, Ultra-Low-Power Microprocessor -- Run-Time Measurement of Harvested Energy for Autarkic Sensor Operation -- Observability Conditions and Automatic Operand-Isolation in High-Throughput Asynchronous Pipelines -- Dynamic Power Management of a Computer with Self Power-Managed Components -- Case Studies of Logical Computation on Stochastic Bit Streams. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book constitutes the refereed proceedings of the 22nd International Conference on Integrated Circuit and System Design, PATMOS 2012, held in Newcastle, UK Spain, in September 2012. The 25 revised full papers presented were carefully reviewed and selected from numerous submissions. The paper feature emerging challenges in methodologies and tools for the design of upcoming generations of integrated circuits and systems, including reconfigurable hardware such as FPGAs. The technical program focus on timing, performance and power consumption as well as architectural aspects with particular emphasis on modeling, design, characterization, analysis and optimization. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Ayala, Jos�e L. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Shang, Delong. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Yakovlev, Alex. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-642-36157-9 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Berlin, Heidelberg : |
| -- | Springer Berlin Heidelberg : |
| -- | Imprint: Springer, |
| -- | 2013. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Logic design. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer communication systems. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer system failures. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Programming languages (Electronic computers). |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer simulation. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer Science. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | System Performance and Evaluation. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Simulation and Modeling. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer Communication Networks. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Register-Transfer-Level Implementation. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Logic Design. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Programming Languages, Compilers, Interpreters. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 0302-9743 ; |
| 912 ## - | |
| -- | ZDB-2-SCS |
| 912 ## - | |
| -- | ZDB-2-LNC |
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