Debug Automation from Pre-Silicon to Post-Silicon (Record no. 55132)

000 -LEADER
fixed length control field 03232nam a22004695i 4500
001 - CONTROL NUMBER
control field 978-3-319-09309-3
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200421111704.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 140925s2015 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783319093093
-- 978-3-319-09309-3
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Dehbashi, Mehdi.
245 10 - TITLE STATEMENT
Title Debug Automation from Pre-Silicon to Post-Silicon
300 ## - PHYSICAL DESCRIPTION
Number of Pages XIV, 171 p. 93 illus., 55 illus. in color.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction -- Preliminaries -- Part I Debug of Design Bugs -- Automated Debugging for Logic Bugs -- Automated Debugging from Pre-Silicon to Post-Silicon -- Automated Debugging for Synchronization Bugs -- Part II Debug of Delay Faults -- Analyzing Timing Variations -- Automated Debugging for Timing Variations -- Efficient Automated Speedpath Debugging -- Part III Debug of Transactions -- Online Debug for NoC-Based Multiprocessor SoCs -- Summary and Outlook.
520 ## - SUMMARY, ETC.
Summary, etc This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers. Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages; Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level; Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.
700 1# - AUTHOR 2
Author 2 Fey, G�orschwin.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-3-319-09309-3
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2015.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Devices.
912 ## -
-- ZDB-2-ENG

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