Digital Signal Processing with Field Programmable Gate Arrays (Record no. 55361)

000 -LEADER
fixed length control field 03228nam a22005415i 4500
001 - CONTROL NUMBER
control field 978-3-642-45309-0
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200421111837.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 140509s2014 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783642453090
-- 978-3-642-45309-0
082 04 - CLASSIFICATION NUMBER
Call Number 621.382
100 1# - AUTHOR NAME
Author Meyer-Baese, Uwe.
245 10 - TITLE STATEMENT
Title Digital Signal Processing with Field Programmable Gate Arrays
250 ## - EDITION STATEMENT
Edition statement 4th ed. 2014.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XXIII, 930 p. 459 illus., 11 illus. in color.
490 1# - SERIES STATEMENT
Series statement Signals and Communication Technology,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Computer Arithmetic -- Finite Impulse Response (FIR) Digital Filtres -- Infinite Impulse Response (IIR) Digital Filtres -- Multirate Signal Processing -- Fourier Transforms -- Advanced Topics -- Adaptive Filtres -- Microprocessor Design.
520 ## - SUMMARY, ETC.
Summary, etc Field-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing. The efficient implementation of front-end digital signal processing algorithms is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 40 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, advanced algorithms with high future potential, and adaptive filters. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices. This new edition incorporates Over 10 new system level case studies designed in VHDL and Verilog A new chapter on image and video processing An Altera Quartus update and new ModelSim simulations Xilinx Atlys board and ISIM simulation support Signed fixed point and floating point IEEE library examples An overview on parallel all-pass IIR filter design ICA and PCA system level designs • Speech and audio coding for MP3 and ADPCM.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-3-642-45309-0
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg :
-- Imprint: Springer,
-- 2014.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprogramming.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Signal, Image and Speech Processing.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Control Structures and Microprogramming.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Circuits and Systems.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 1860-4862
912 ## -
-- ZDB-2-ENG

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