SVA: The Power of Assertions in SystemVerilog (Record no. 56890)
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| 000 -LEADER | |
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| fixed length control field | 04368nam a22005055i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-319-07139-8 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200421112045.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 140823s2015 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783319071398 |
| -- | 978-3-319-07139-8 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Cerny, Eduard. |
| 245 10 - TITLE STATEMENT | |
| Title | SVA: The Power of Assertions in SystemVerilog |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 2nd ed. 2015. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XIX, 590 p. 173 illus. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Part I. Opening -- Introduction -- System Verilog Language and Overview -- System Verilog Simulation Semantics -- Part II. Basic Assertions -- Assertion Statements -- Basic Properties -- Basic Sequences -- Assertion System Functions and Tasks -- Part III. Metalanguage Constructs -- Let, Sequence and Property Declarations; Inference.- Checkers -- Part IV. Advanced Assertions -- Advanced Properties -- Advanced Sequences.- Clocks -- Resets -- Procedural Concurrent Assertions.- An Apology for Local Variables -- Mechanics of Local Variables -- Recursive Properties -- Coverage -- Debugging Assertions and Efficiency Considerations -- Part V. Formal Verification -- Introduction to Assertion-Based Formal Verification.- Formal Verification and Models.- Formal Semantics.- Part VI. Advanced Checkers -- Checkers in Formal Verification.- Checker Libraries -- Appendix -- References.- Index. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book is a comprehensive guide to assertion-based verification of hardware designs using SystemVerilog Assertions (SVA).  It enables readers to minimize the cost of verification by using assertion-based techniques in simulation testing, coverage collection, and formal analysis.  The book provides detailed descriptions of all the language features of SVA, accompanied by step-by-step examples of how to employ them to construct powerful and reusable sets of properties.  The book also shows how SVA fits into the broader SystemVerilog language, demonstrating the ways that assertions can interact with other SystemVerilog components.  The reader new to hardware verification will benefit from general material describing the nature of design models and behaviors, how they are exercised, and the different roles that assertions play.  This second edition covers the features introduced by the recent IEEE 1800-2012 SystemVerilog standard, explaining in detail the new and enhanced assertion constructs. The book makes SVA usable and accessible for hardware designers, verification engineers, formal verification specialists, and EDA tool developers.  With numerous exercises, ranging in depth and difficulty, the book is also suitable as a text for students.  �         Provides a comprehensive guide to assertion-based verification with SystemVerilog Assertions (SVA); �         Includes step-by-step examples of how SVA can be used to construct powerful  and reusable sets of properties; �         Covers the entire SVA language with all the recent enhancements of the IEEE 1800-2012 SystemVerilog standard. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Dudani, Surrendra. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Havlicek, John. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Korchemny, Dmitry. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-319-07139-8 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2015. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
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| 347 ## - | |
| -- | text file |
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| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Processor Architectures. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Devices. |
| 912 ## - | |
| -- | ZDB-2-ENG |
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