Scalable and Near-Optimal Design Space Exploration for Embedded Systems (Record no. 57485)

000 -LEADER
fixed length control field 03327nam a22005295i 4500
001 - CONTROL NUMBER
control field 978-3-319-04942-7
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200421112222.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 140321s2014 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783319049427
-- 978-3-319-04942-7
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Kritikakou, Angeliki.
245 10 - TITLE STATEMENT
Title Scalable and Near-Optimal Design Space Exploration for Embedded Systems
300 ## - PHYSICAL DESCRIPTION
Number of Pages XVII, 277 p. 80 illus., 2 illus. in color.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction & Motivation -- Reusable DSE methodology for scalable & near-optimal frameworks -- Part I Background memory management methodologies -- Development of intra-signal in-place methodology -- Pattern representation -- Intra-signal in-place methodology for non-overlapping scenario -- Intra-signal in-place methodology for overlapping scenario -- Part II Processing related mapping methodologies -- Design-time scheduling techniques DSE framework -- Methodology to develop design-time scheduling techniques under constraints -- Design Exploration Methodology for Microprocessor & HW accelerators -- Conclusions & Future Directions.
520 ## - SUMMARY, ETC.
Summary, etc This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies.  The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems.  Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.   • Describes design space exploration (DSE) methodologies for data storage and processing in embedded systems, which achieve near-optimal solutions with scalable exploration time; • Presents a set of principles and the processes which support the development of the proposed scalable and near-optimal methodologies; • Enables readers to apply scalable and near-optimal methodologies to the intra-signal in-place optimization step for both regular and irregular memory accesses.
700 1# - AUTHOR 2
Author 2 Catthoor, Francky.
700 1# - AUTHOR 2
Author 2 Goutis, Costas.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-3-319-04942-7
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2014.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Energy.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microelectronics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics and Microelectronics, Instrumentation.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Energy, general.
912 ## -
-- ZDB-2-ENG

No items available.