Protecting Chips Against Hold Time Violations Due to Variability (Record no. 57514)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03195nam a22004695i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-94-007-2427-3 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200421112223.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 131001s2014 ne | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9789400724273 |
| -- | 978-94-007-2427-3 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Neuberger, Gustavo. |
| 245 10 - TITLE STATEMENT | |
| Title | Protecting Chips Against Hold Time Violations Due to Variability |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XI, 107 p. 76 illus., 51 illus. in color. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Introduction, Process Variations and Flip-Flops -- Process Variability -- Flip-Flops and Hold Time Violations -- Circuits Under Test -- Measurement Circuits -- Experimental Results -- Systematic and Random Variablility -- Normality Tests -- Probability of Hold Time Violations -- Protecting Circuits Against Hold Time Violations -- Padding Efficiency Of the Proposed Padding Algorithm -- Final Remarks. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The consequences of variability to several aspects of circuit design, such as logic gates, storage elements, clock distribution, and any other that can be affected by process variations are discussed, with a key focus on storage elements.  The authors present a statistical analysis of the critical clock skew in several test paths, due to process variability in 130nm and 90nm CMOS technology. To facilitate an on-wafer test, a measurement circuit with a precision compatible to the speed of the technology is described.  �         Provides a comprehensive review of various reliability mechanisms; �         Describes practical modeling and characterization techniques for reliability �         Includes thorough presentation of robust design techniques for major VLSI design units �         Promotes physical understanding with first-principle simulations. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Wirth, Gilson. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Reis, Ricardo. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-94-007-2427-3 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Dordrecht : |
| -- | Springer Netherlands : |
| -- | Imprint: Springer, |
| -- | 2014. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Processor Architectures. |
| 912 ## - | |
| -- | ZDB-2-ENG |
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