Exploring Memory Hierarchy Design with Emerging Memory Technologies (Record no. 57748)
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| 000 -LEADER | |
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| fixed length control field | 03440nam a22004935i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-319-00681-9 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200421112227.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 130918s2014 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783319006819 |
| -- | 978-3-319-00681-9 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Sun, Guangyu. |
| 245 10 - TITLE STATEMENT | |
| Title | Exploring Memory Hierarchy Design with Emerging Memory Technologies |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | VII, 122 p. 71 illus., 57 illus. in color. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Lecture Notes in Electrical Engineering, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Introduction -- Replacing Different Levels of the Memory Hierarchy with NVMs -- Moguls: a Model to Explore the Memory Hierarchy for Throughput Computing -- Exploring the Vulnerability of CMPs to Soft Errors with 3D Stacked Non-Volatile Memory. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book equips readers with tools for computer architecture of high performance, low power, and high reliability memory hierarchy in computer systems based on emerging memory technologies, such as STTRAM, PCM, FBDRAM, etc.  The techniques described offer advantages of high density, near-zero static power, and immunity to soft errors, which have the potential of overcoming the "memory wall."  The authors discuss memory design from various perspectives: emerging memory technologies are employed in the memory hierarchy with novel architecture modification;  hybrid memory structure is introduced to leverage advantages from multiple memory technologies; an analytical model named "Moguls" is introduced to explore quantitatively the optimization design of a memory hierarchy; finally, the vulnerability of the CMPs to radiation-based soft errors is improved by replacing different levels of on-chip memory with STT-RAMs.   �         Provides a holistic study of using emerging memory technologies in different levels of the memory hierarchy; �         Equips readers with techniques for memory design with improved performance, energy consumption, and reliability; �         Includes coverage of all memory levels, ranging from cache to storage; �         Explains how to choose the proper memory technologies in different levels of the memory hierarchy. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://dx.doi.org/10.1007/978-3-319-00681-9 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2014. |
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| -- | computer |
| -- | c |
| -- | rdamedia |
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| -- | online resource |
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| -- | text file |
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| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Semiconductors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Processor Architectures. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Semiconductors. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 1876-1100 ; |
| 912 ## - | |
| -- | ZDB-2-ENG |
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