Routing Algorithms in Networks-on-Chip (Record no. 59152)

000 -LEADER
fixed length control field 03677nam a22004935i 4500
001 - CONTROL NUMBER
control field 978-1-4614-8274-1
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200421112556.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 131022s2014 xxu| s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9781461482741
-- 978-1-4614-8274-1
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
245 10 - TITLE STATEMENT
Title Routing Algorithms in Networks-on-Chip
300 ## - PHYSICAL DESCRIPTION
Number of Pages XIV, 410 p. 219 illus., 97 illus. in color.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Part I Performance Improvement -- Basic Concepts on On-Chip Networks -- A Heuristic Framework for Designing and Exploring Deterministic Routing Algorithm for NoCs -- Run-Time Deadlock Detection -- The Abacus Turn Model -- Learning-based Routing Algorithms for on-Chip Networks -- Part II Multicast Communication -- Efficient and Deadlock-Free Tree-based Multicast Routing Method for Network-on-Chip -- Path-based Multicast Routing for 2D and 3D Mesh Networks -- Part III Fault Tolerance and Reliability -- Fault-Tolerant Routing Algorithms in Networks-on-Chip -- Reliable and Adaptive Algorithms for 2D and 3D Networks-on-Chip.
520 ## - SUMMARY, ETC.
Summary, etc This book provides a single-source reference to routing algorithms for Networks-on-Chip (NoCs), as well as in-depth discussions of advanced solutions applied to current and next generation, many core NoC-based Systems-on-Chip (SoCs). After a basic introduction to the NoC design paradigm and architectures, routing algorithms for NoC architectures are presented and discussed at all abstraction levels, from the algorithmic level to actual implementation.  Coverage emphasizes the role played by the routing algorithm and is organized around key problems affecting current and next generation, many-core SoCs. A selection of routing algorithms is included, specifically designed to address key issues faced by designers in the ultra-deep sub-micron (UDSM) era, including performance improvement, power, energy, and thermal issues, fault tolerance and reliability.   �         Provides a comprehensive overview of routing algorithms for Networks-on-Chip and NoC-based, manycore systems; �         Describes routing algorithms for NoC architectures at all abstraction levels, from the algorithmic level to actual implementation; �         Discusses the impact on NoC routing algorithms of key design objectives, such as power dissipation, energy consumption, thermal aspects, reliability, and performance.
700 1# - AUTHOR 2
Author 2 Palesi, Maurizio.
700 1# - AUTHOR 2
Author 2 Daneshtalab, Masoud.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-1-4614-8274-1
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- New York, NY :
-- Springer New York :
-- Imprint: Springer,
-- 2014.
336 ## -
-- text
-- txt
-- rdacontent
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-- computer
-- c
-- rdamedia
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-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microelectronics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics and Microelectronics, Instrumentation.
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-- ZDB-2-ENG

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