Real-time embedded systems / (Record no. 68951)
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| fixed length control field | 12389cam a2200745 i 4500 |
| 001 - CONTROL NUMBER | |
| control field | ocn992437550 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220711203441.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 170628s2017 nju ob 001 0 eng |
| 019 ## - | |
| -- | 1066604367 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781119420705 |
| -- | (pdf) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 1119420709 |
| -- | (pdf) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781119420682 |
| -- | (epub) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 1119420687 |
| -- | (epub) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781119420712 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 1119420717 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| -- | (hardback) |
| 029 1# - (OCLC) | |
| OCLC library identifier | AU@ |
| System control number | 000060424887 |
| 029 1# - (OCLC) | |
| OCLC library identifier | CHBIS |
| System control number | 011094855 |
| 029 1# - (OCLC) | |
| OCLC library identifier | CHNEW |
| System control number | 000964897 |
| 029 1# - (OCLC) | |
| OCLC library identifier | CHVBK |
| System control number | 495227625 |
| 029 1# - (OCLC) | |
| OCLC library identifier | CHVBK |
| System control number | 503874914 |
| 029 1# - (OCLC) | |
| OCLC library identifier | DEBSZ |
| System control number | 493821260 |
| 029 1# - (OCLC) | |
| OCLC library identifier | GBVCP |
| System control number | 1014966566 |
| 082 00 - CLASSIFICATION NUMBER | |
| Call Number | 006.2/2 |
| 100 1# - AUTHOR NAME | |
| Author | Wang, Jiacun, |
| 245 10 - TITLE STATEMENT | |
| Title | Real-time embedded systems / |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 1 online resource. |
| 490 0# - SERIES STATEMENT | |
| Series statement | Quantitative software engineering series |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | "Offering comprehensive coverage of the convergence of real-time embedded systems scheduling, resource access control, software design and development, and high-level system modeling, analysis and verification; Following an introductory overview, Dr. Wang delves into the specifics of hardware components, including processors, memory, I/O devices and architectures, communication structures, peripherals, and characteristics of real-time operating systems. Later chapters are dedicated to real-time task scheduling algorithms and resource access control policies, as well as priority-inversion control and deadlock avoidance. Concurrent system programming and POSIX programming for real-time systems are covered, as are finite state machines and Time Petri nets. Of special interest to software engineers will be the chapter devoted to model checking, in which the author discusses temporal logic and the NuSMV model checking tool, as well as a chapter treating real-time software design with UML. The final portion of the book explores practical issues of software reliability, aging, rejuvenation, security, safety, and power management. In addition, the book: Explains real-time embedded software modeling and design with finite state machines, Petri nets, and UML, and real-time constraints verification with the model checking tool, NuSMV Features real-world examples in finite state machines, model checking, real-time system design with UML, and more Covers embedded computer programing, designing for reliability, and designing for safety Explains how to make engineering trade-offs of power use and performance Investigates practical issues concerning software reliability, aging, rejuvenation, security, and power management Real-Time Embedded Systems is a valuable resource for those responsible for real-time and embedded software design, development, and management. It is also an excellent textbook for graduate courses in computer engineering, computer science, information technology, and software engineering on embedded and real-time software systems, and for undergraduate computer and software engineering courses"-- |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | "This book offers comprehensive coverage of the convergence of real-time embedded systems scheduling, resource access control, software design and development, and high-level system modeling, analysis and verification"-- |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Cover -- Title Page -- Copyright -- Contents -- Preface -- Book Layout -- Acknowledgments -- Chapter 1 Introduction to Real-Time Embedded Systems -- 1.1 Real-Time Embedded Systems -- 1.2 Example: Automobile Antilock Braking System -- 1.2.1 Slip Rate and Brake Force -- 1.2.2 ABS Components -- 1.2.2.1 Sensors -- 1.2.2.2 Valves and Pumps -- 1.2.2.3 Electrical Control Unit -- 1.2.3 ABS Control -- 1.3 Real-Time Embedded System Characteristics -- 1.3.1 System Structure -- 1.3.2 Real-Time Response -- 1.3.3 Highly Constrained Environments -- 1.3.4 Concurrency -- 1.3.5 Predictability -- 1.3.6 Safety and Reliability -- 1.4 Hard and Soft Real-Time Embedded Systems -- Suggestions for Reading -- References -- Chapter 2 Hardware Components -- 2.1 Processors -- 2.1.1 Microprocessors -- 2.1.2 Microcontrollers -- 2.1.3 Application-Specific Integrated Circuits (ASICs) -- 2.1.4 Field-Programmable Gate Arrays (FPGAs) -- 2.1.5 Digital Signal Processors (DSPs) -- 2.1.6 Application-Specific Instruction Set Processors (ASIPs) -- 2.1.7 Multicore Processors -- 2.1.8 Von Neumann Architecture and Harvard Architecture -- 2.1.9 Complex Instruction Set Computing and Reduced Instruction Set Computing -- 2.2 Memory and Cache -- 2.2.1 Read-Only Memory (ROM) -- 2.2.2 Random-Access Memory (RAM) -- 2.2.3 Cache Memory -- 2.3 I/O Interfaces -- 2.4 Sensors and Actuators -- 2.5 Timers and Counters -- Suggestions for Reading -- References -- Chapter 3 Real-Time Operating Systems -- 3.1 Main Functions of General-Purpose Operating Systems -- 3.1.1 Process Management -- 3.1.2 Memory Management -- 3.1.3 Interrupts Management -- 3.1.4 Multitasking -- 3.1.5 File System Management -- 3.1.6 I/O Management -- 3.2 Characteristics of RTOS Kernels -- 3.2.1 Clocks and Timers -- 3.2.2 Priority Scheduling -- 3.2.3 Intertask Communication and Resource Sharing -- 3.2.3.1 Real-Time Signals. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Remark 2 | 3.2.3.2 Semaphores -- 3.2.3.3 Message Passing -- 3.2.3.4 Shared Memory -- 3.2.4 Asynchronous I/O -- 3.2.5 Memory Locking -- 3.3 RTOS Examples -- 3.3.1 LynxOS -- 3.3.2 OSE -- 3.3.3 QNX -- 3.3.4 VxWorks -- 3.3.5 Windows Embedded Compact -- Suggestions for Reading -- References -- URLs -- Chapter 4 Task Scheduling -- 4.1 Tasks -- 4.1.1 Task Specification -- 4.1.2 Task States -- 4.1.3 Precedence Constraints -- 4.1.4 Task Assignment and Scheduling -- 4.2 Clock-Driven Scheduling -- 4.2.1 Structured Clock-Driven Scheduling -- 4.2.1.1 Frames -- 4.2.1.2 Task Slicing -- 4.2.2 Scheduling Aperiodic Tasks -- 4.2.3 Scheduling Sporadic Tasks -- 4.3 Round-Robin Approach -- 4.4 Priority-Driven Scheduling Algorithms -- 4.4.1 Fixed-Priority Algorithms -- 4.4.1.1 Schedulability Test Based on Time Demand Analysis -- 4.4.1.2 Deadline-Monotonic Algorithm -- 4.4.2 Dynamic-Priority Algorithms -- 4.4.2.1 Earliest-Deadline-First (EDF) Algorithm -- 4.4.2.2 Optimality of EDF -- 4.4.3 Priority-Driven Scheduling of Aperiodic and Sporadic Tasks -- 4.4.3.1 Scheduling of Aperiodic Tasks -- 4.4.3.2 Scheduling of Sporadic Tasks -- 4.4.4 Practical Factors -- 4.4.4.1 Nonpreemptivity -- 4.4.4.2 Self-Suspension -- 4.4.4.3 Context Switches -- 4.4.4.4 Schedulability Test -- 4.5 Task Assignment -- 4.5.1 Bin-Packing Algorithms -- 4.5.1.1 First-Fit Algorithm -- 4.5.1.2 First-Fit Decreasing Algorithm -- 4.5.1.3 Rate-Monotonic First-Fit (RMFF) Algorithm -- 4.5.2 Assignment with Communication Cost -- Suggestions for Reading -- References -- Chapter 5 Resource Sharing and Access Control -- 5.1 Resource Sharing -- 5.1.1 Resource Operation -- 5.1.2 Resource Requirement Specification -- 5.1.3 Priority Inversion and Deadlocks -- 5.1.4 Resource Access Control -- 5.2 Nonpreemptive Critical Section Protocol -- 5.3 Priority Inheritance Protocol -- 5.3.1 Rules of Priority Inheritance Protocol. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Remark 2 | 5.3.2 Properties of Priority Inheritance Protocol -- 5.4 Priority Ceiling Protocol -- 5.4.1 Rules of Priority Ceiling Protocol -- 5.4.2 Properties of Priority Ceiling Protocol -- 5.4.3 Worst-Case Blocking Time -- 5.5 Stack-Sharing Priority Ceiling Protocol -- 5.5.1 Rules of Stack-Sharing Priority Ceiling Protocol -- 5.5.2 Properties of Stack-Sharing Priority Ceiling Protocol -- Suggestion for Reading -- References -- Chapter 6 Concurrent Programming -- 6.1 Introduction -- 6.2 POSIX Threads -- 6.3 Synchronization Primitives -- 6.3.1 Race Conditions and Critical Sections -- 6.3.2 Mutex -- 6.3.3 Condition Variables -- 6.3.4 Semaphores -- 6.4 Communication among Tasks -- 6.4.1 Message Queues -- 6.4.2 Shared Memory -- 6.4.3 Shared Memory Protection -- 6.5 Real-Time Facilities -- 6.5.1 Real-Time Signals -- 6.5.1.1 Blocking Signals -- 6.5.1.2 Dealing with Signals -- 6.5.2 Timers -- 6.5.3 Implement Periodic Tasks -- 6.5.3.1 Using sleep() Function -- 6.5.3.2 Using Timers -- 6.5.4 Implement an Application with Multiple Periodic Tasks -- Suggestions for Reading -- References -- Chapter 7 Finite-State Machines -- 7.1 Finite State Machine Basics -- 7.2 Deterministic Finite Automation (DFA) -- 7.2.1 Moore Machines -- 7.2.2 Mealy Machines -- 7.3 Nondeterministic Finite Automation -- 7.4 Programming Finite-State Machines -- Suggestions for Reading -- References -- Chapter 8 UML State Machines -- 8.1 States -- 8.2 Transitions -- 8.3 Events -- 8.4 Composite States -- 8.4.1 Hierarchy -- 8.4.2 Orthogonality -- 8.4.3 Submachine States -- 8.5 Pseudostates -- 8.5.1 History Pseudostates -- 8.5.2 Entry and Exit Points -- 8.5.3 Fork and Join Pseudostates -- 8.5.4 Terminate Pseudostates -- 8.6 UML State Machine of Antilock Braking System -- Suggestions for Reading -- References -- Chapter 9 Timed Petri Nets -- 9.1 Petri Net Definition -- 9.1.1 Transition Firing. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Remark 2 | 9.1.2 Modeling Power -- 9.2 Petri Net Properties -- 9.2.1 Behavioral Properties -- 9.2.1.1 Reachability -- 9.2.1.2? Markings -- 9.2.1.3 Reachability Analysis Algorithm -- 9.2.1.4 Boundedness and Safeness -- 9.2.1.5 Liveness -- 9.2.2 Structural Properties -- 9.2.2.1 T-Invariants and S-Invariants -- 9.2.2.2 Siphons and Traps -- 9.3 Timed Petri Nets -- 9.3.1 Deterministic Timed Petri Nets -- 9.3.1.1 Performance Evaluation Based on DTPNs -- 9.3.2 Time Petri Nets -- 9.3.2.1 States in a Time Petri Net -- 9.3.2.2 Enabling and Firing Conditions of Transitions -- 9.3.2.3 Firing Rules -- Suggestions for Reading -- References -- Chapter 10 Model Checking -- 10.1 Introduction to Model Checking -- 10.2 Temporal Logic -- 10.2.1 Linear Temporal Logic -- 10.2.1.1 Syntax of LTL -- 10.2.1.2 Parse Trees for LTL Formulas -- 10.2.1.3 Semantics of LTL -- 10.2.1.4 Equivalencies of LTL Formulas -- 10.2.1.5 System Property Specification -- 10.2.2 Computation Tree logic -- 10.2.2.1 Syntax of CTL -- 10.2.2.2 Semantics of CTL -- 10.2.2.3 Equivalencies of CTL Formulas -- 10.2.3 LTL versus CTL -- 10.3 The NuSMV Model Checking Tool -- 10.3.1 Description Language -- 10.3.1.1 Single-Module SMV Program -- 10.3.1.2 Multimodule SMV Program -- 10.3.1.3 Asynchronous Systems -- 10.3.2 Specifications -- 10.3.3 Running NuSMV -- 10.4 Real-Time Computation Tree Logic -- Suggestions for Reading -- References -- Chapter 11 Practical Issues -- 11.1 Software Reliability -- 11.1.1 Software Faults -- 11.1.2 Reliability Measurement -- 11.1.3 Improving Software Reliability -- 11.1.3.1 Fault Avoidance -- 11.1.3.2 Fault Removal -- 11.1.3.3 Fault Tolerance -- 11.1.3.4 Fault Recovery -- 11.2 Software Aging and Rejuvenation -- 11.3 Security -- 11.3.1 Challenges -- 11.3.2 Common Vulnerabilities -- 11.3.3 Secure Software Design -- 11.4 Safety -- 11.5 Power Conservation -- Suggestions for Reading. |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| General subdivision | Electronics |
| -- | Microelectronics. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1002/9781119420712 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Hoboken, NJ, USA : |
| -- | Wiley, |
| -- | 2017. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | n |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | nc |
| -- | rdacarrier |
| 347 ## - | |
| -- | data file |
| -- | rda |
| 520 ## - SUMMARY, ETC. | |
| -- | Provided by publisher. |
| 520 ## - SUMMARY, ETC. | |
| -- | Provided by publisher. |
| 588 0# - | |
| -- | Print version record and CIP data provided by publisher. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Embedded computer systems. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Real-time data processing. |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | TECHNOLOGY & ENGINEERING |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Embedded computer systems. |
| -- | (OCoLC)fst00908298 |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Real-time data processing. |
| -- | (OCoLC)fst01091219 |
| 994 ## - | |
| -- | C0 |
| -- | DG1 |
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