Practical ESD protection design / (Record no. 69735)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 04714cam a2200589Ii 4500 |
| 001 - CONTROL NUMBER | |
| control field | on1288343591 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220711203739.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 211213s2022 nju ob 001 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781119850434 |
| -- | (electronic bk. : oBook) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 1119850436 |
| -- | (electronic bk. : oBook) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781119850427 |
| -- | (electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 1119850428 |
| -- | (electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781119850410 |
| -- | (electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 111985041X |
| -- | (electronic bk.) |
| 029 1# - (OCLC) | |
| OCLC library identifier | AU@ |
| System control number | 000070396089 |
| 037 ## - | |
| -- | 9646315 |
| -- | IEEE |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Wang, Albert Z. H., |
| 245 10 - TITLE STATEMENT | |
| Title | Practical ESD protection design / |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 1 online resource. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Why ESD? -- ESD Failure Analysis -- ESD Test Models and Standards -- ESD Protection Devices -- ESD Protection Circuits -- Full-Chip ESD Protection -- Mixed-Signal and HV ESD Protection -- TCAD-Based Mixed-Mode ESD Protection Designs -- RF ESD Protection -- ESD-RFIC Co-Design -- ESD Layout Designs -- ESD versus IC Technologies -- ESD Circuit Simulation by SPICE -- Emerging ESD Protection -- ESD CAD for Full-Chip Design Verification -- New CDM ESD Protection -- Future ESD Protection Outlook. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | PRACTICAL ESD PROTECTION DESIGN An authoritative single-volume reference on the design and analysis of ESD protection for ICs Electrostatic discharge (ESD) is a major reliability challenge to semiconductors, integrated circuits (ICs), and microelectronic systems. On-chip ESD protection is vital to any electronic products, such as smartphones, laptops, tablets, and other electronic devices. Practical ESD Protection Design provides comprehensive and systematic guidance on all major aspects of designs of on-chip ESD protection for integrated circuits (ICs). Written for students and practicing engineers alike, this one-stop resource covers essential theories, hands-on design skills, computer-aided design (CAD) methods, characterization and analysis techniques, and more on ESD designs. Detailed chapters examine an array of topics ranging from fundamental to advanced, including ESD phenomena, ESD failure analysis, ESD testing models, ESD protection devices and circuits, ESD design layout and technology effects, ESD design flows and co-design methods, ESD modelling and CAD techniques, future ESD protection designs, and circuit simulation modelling. Based on the author's decades of design, research, and teaching experiences, Practical ESD Protection Design: Features numerous real-world ESD protection design examples Emphasizes on ESD protection design techniques and procedures Describes ESD-IC co-design methodology for high-performance mixed-signal ICs and broadband radio-frequency (RF) ICs Discusses CAD-based ESD protection design optimization and prediction using both Technology and Electrical Computer-Aided Design (TCAD/ECAD) simulation Addresses new ESD CAD algorithms and tools for full-chip ESD physical design verification Explores the disruptive future outlook of ESD protection Practical ESD Protection Design is a valuable reference for industrial engineers and academic researchers in the field, and an excellent textbook for electronic engineering courses in semiconductor microelectronics and integrated circuit design. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| General subdivision | Design and construction. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| General subdivision | Protection. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| General subdivision | Prevention. |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| General subdivision | Design and construction. |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| General subdivision | Protection. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1002/9781119850434 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Hoboken, NJ : |
| -- | Wiley : |
| -- | IEEE Press, |
| -- | [2022] |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 588 0# - | |
| -- | Online resource; title from PDF title page (John Wiley, viewed December 13, 2021). |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Integrated circuits |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Integrated circuits |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electric discharges |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electrostatics. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Static eliminators. |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electrostatics. |
| -- | (OCoLC)fst00907767 |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Integrated circuits |
| -- | (OCoLC)fst00975545 |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Integrated circuits |
| -- | (OCoLC)fst00975587 |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Static eliminators. |
| -- | (OCoLC)fst01132020 |
| 994 ## - | |
| -- | 92 |
| -- | DG1 |
No items available.