Silicon based unified memory devices and technology / (Record no. 70553)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 06208cam a2200637Mi 4500 |
| 001 - CONTROL NUMBER | |
| control field | 9781315206868 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220711212155.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 170715s2017 flu ob 001 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781351798310 |
| -- | (electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 1351798316 |
| -- | (electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781315206868 |
| -- | (electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 1315206862 |
| -- | (electronic bk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781351798327 |
| -- | (electronic bk. : PDF) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 1351798324 |
| -- | (electronic bk. : PDF) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781351798303 |
| -- | (electronic bk. : Mobipocket) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 1351798308 |
| -- | (electronic bk. : Mobipocket) |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.39732 |
| 100 1# - AUTHOR NAME | |
| Author | Bhattacharyya, Arup, |
| 245 10 - TITLE STATEMENT | |
| Title | Silicon based unified memory devices and technology / |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 1 online resource (681 pages) |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Cover; Half Title; Title Page; Copyright Page; Dedication; Table of Contents; Foreword; Preface; Acknowledgments; Author; PART I Conventional Silicon Based NVM Devices; Chapter 1 Silicon Based Digital Volatile and Nonvolatile Memories: An Introductory Overview; 1.1 Digital Memories and Binary States: Basic Concepts; 1.2 Volatile Memories and NVMs; 1.2.1 Static Random Access Memory: SRAM; 1.2.2 Dynamic Random Access Memory: DRAM; 1.2.3 Read-Only Memory: ROM; 1.2.4 EPROM, EEPROM, and E2PROM; 1.2.5 Recent NVMs: NROM and NAND Flash Memories; 1.3 Memory Hierarchy in Digital Systems. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Remark 2 | 1.4 Fundamental Memory Concept in NVMs1.5 NVM Device Groupings and Nomenclature; References; Chapter 2 Historical Progression of NVM Devices; 2.1 Floating-Gate Devices; 2.1.1 The FAMOS Device; 2.1.2 The SAMOS Device; 2.1.3 The SAMOS 8 Kb EAROM; 2.1.4 The SIMOS Device; 2.1.5 Chronology of Floating-Gate Device Evolution; 2.1.6 The HIMOS Cell; 2.1.7 The ETOX/FLOTOX Cell; 2.1.8 The DINOR Cell; 2.1.9 The NAND Cell; 2.2 Conventional Charge-Trapping Devices; 2.2.1 MNOS/MXOS/MONOS/SNOS/SONOS; 2.2.2 Historical Evolution of MNOS, MXOS to SONOS CT Devices; 2.2.3 Evolution of CT-NVM Cell Designs. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Remark 2 | 2.2.3.1 Tri-Gate Memory Cell2.2.3.2 Pass Gate Memory Cell; 2.3 Nanocrystal Charge-Trapping NVM Devices; 2.3.1 Early History; 2.3.2 Nanocrystal Physics and Charge Trapping; 2.3.3 Review of Nanocrystal NVM Devices; 2.3.4 Nanocrystal Device General Characteristics; 2.3.5 Silicon Nanocrystal Device Characteristics; 2.3.6 Metal Nanocrystal Device Characteristics; 2.3.7 Germanium Nanocrystal Device Characteristics; 2.4 Direct Tunnel Memory; References; Chapter 3 General Properties of Dielectrics and Interfaces for NVM Devices; 3.0 The NVM Gate Stack Layers and Interfaces. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Remark 2 | 3.1 Attributes of Gate Stacks for NVM Devices3.1.1 The Energy Band of the Gate Stack Layers; 3.2 General Properties of Thin Dielectric Films; 3.2.1 Physical, Chemical, and Thermal Stability; 3.2.2 Electronic Properties; 3.2.3 Bulk and Interface Defects and Charge Trapping; 3.2.4 Charge Transport; 3.2.5 Figure of Merit for Selected Metal-Oxide Dielectric Films; 3.2.5.1 Metal Work Function and Electron Affinity; 3.3 Interfaces, Electrode Compatibility, and Process Sensitivity; 3.4 Gate Material for NVM Devices; 3.5 Dielectric Conductivity Mechanisms. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Remark 2 | 3.5.1 Bulk-Controlled Poole-Frenfel Mechanism3.5.2 Electrode-Controlled Quantum Mechanical Tunneling Mechanisms; 3.5.3 Direct Tunneling and/or Modified Fowler-Nordheim Tunneling; 3.5.3.1 Fowler-Nordheim Tunneling; 3.5.3.2 Enhanced Fowler-Nordheim Tunneling; 3.6 Carrier Transport Mechanisms for Multilayer Dielectrics; References; Chapter 4 Dielectric Films for NVM Devices; 4.0 Conventional Dielectric Films for NVM Devices; 4.1 Thermal Oxide: SiO2; 4.1.1 Defect Generation and Oxide Degradation; 4.1.1.1 Oxide Reliability; 4.2 CVD or LPCVD Nitride: Si3N4. |
| 500 ## - GENERAL NOTE | |
| Remark 1 | 4.2.1 Nitride Traps, Trap Creation: Process and Stress Sensitivity. |
| 520 2# - SUMMARY, ETC. | |
| Summary, etc | "The primary focus of this book is on basic device concepts, memory cell design, and process technology integration. The first part provides in-depth coverage of conventional nonvolatile memory devices, stack structures from device physics, historical perspectives, and identifies limitations of conventional devices. The second part reviews advances made in reducing and/or eliminating existing limitations of NVM device parameters from the standpoint of device scalability, application extendibility, and reliability. The final part proposes multiple options of silicon based unified (nonvolatile) memory cell concepts and stack designs (SUMs). The book provides Industrial R & D personnel with the knowledge to drive the future memory technology with the established silicon FET-based establishments of their own. It explores application potentials of memory in areas such as robotics, avionics, health-industry, space vehicles, space sciences, bio-imaging, genetics etc."--Provided by publisher. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| General subdivision | Design and construction. |
| 650 07 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| General subdivision | Electronics |
| -- | Circuits |
| -- | General. |
| 650 07 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| General subdivision | Electronics |
| -- | Microelectronics. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://www.taylorfrancis.com/books/9781315206868 |
| 856 42 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | http://www.oclc.org/content/dam/oclc/forms/terms/vbrl-201703.pdf |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Boca Raton, FL : |
| -- | CRC Press, |
| -- | [2017] |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 588 ## - | |
| -- | OCLC-licensed vendor bibliographic record. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Semiconductor storage devices |
| 650 07 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | TECHNOLOGY & ENGINEERING |
| 650 07 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | TECHNOLOGY & ENGINEERING |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | TECHNOLOGY / Electricity |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | TECHNOLOGY / Electronics / General |
| 650 #7 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | TECHNOLOGY / Electronics / Circuits / General |
No items available.