From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators (Record no. 75202)

000 -LEADER
fixed length control field 03929nam a22005535i 4500
001 - CONTROL NUMBER
control field 978-3-319-53768-9
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20220801213446.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 170425s2017 sz | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783319537689
-- 978-3-319-53768-9
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Rahimi, Abbas.
245 10 - TITLE STATEMENT
Title From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2017.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XV, 197 p. 86 illus., 48 illus. in color.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction -- Part 1. Predicting and Preventing Errors -- Instruction-Level Tolerance -- Sequence-Level Tolerance -- Procedure-Level Tolerance -- Kernel-Level Tolerance -- Hierarchically Focused Guardbanding -- Part 2. Detecting and Correcting Errors -- Work-Unit Tolerance -- Memristive-Based Associative Memory for Error Recovery -- Part 3. Accepting Errors -- Accuracy-Configurable OpenMP -- An Approximation Workflow for Exploiting Data-Level Parallelism in FPGA Acceleration -- Memristive-Based Associative Memory for Approximate Computational Reuse -- Spatial and Temporal Memoization -- Outlook.
520 ## - SUMMARY, ETC.
Summary, etc This book focuses on computing devices and their design at various levels to combat variability. The authors provide a review of key concepts with particular emphasis on timing errors caused by various variability sources. They discuss methods to predict and prevent, detect and correct, and finally conditions under which such errors can be accepted; they also consider their implications on cost, performance and quality. Coverage includes a comparative evaluation of methods for deployment across various layers of the system from circuits, architecture, to application software. These can be combined in various ways to achieve specific goals related to observability and controllability of the variability effects, providing means to achieve cross layer or hybrid resilience. · Covers challenges and opportunities in identifying microelectronic variability and the resulting errors at various layers in the system abstraction; · Enables readers to assess how various levels of circuit and system design can mitigate the effects of variability; · Demonstrates overall system architecture of what is now called “approximate computing” paradigm in massively parallel integrated architectures and accelerators.
700 1# - AUTHOR 2
Author 2 Benini, Luca.
700 1# - AUTHOR 2
Author 2 Gupta, Rajesh K.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-3-319-53768-9
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2017.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computer architecture.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Logic design.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Logic Design.
912 ## -
-- ZDB-2-ENG
912 ## -
-- ZDB-2-SXE

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