Introduction to SystemVerilog (Record no. 75978)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 04327nam a22005295i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-030-71319-5 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220801214123.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 210706s2021 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783030713195 |
| -- | 978-3-030-71319-5 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Mehta, Ashok B. |
| 245 10 - TITLE STATEMENT | |
| Title | Introduction to SystemVerilog |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2021. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XXXV, 852 p. 156 illus., 148 illus. in color. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Introduction -- Data Types -- Arrays -- Queues -- Structures -- Packages -- Class -- SystemVerilog 'module' -- SystemVerilog 'program' -- Interfaces -- Operators -- Constrained Random Test Generation and Verification -- SystemVerilog Assertions -- Functional Coverage -- SystemVerilog Processes -- Procedural programming statements -- Processes -- Tasks and Functions -- Clocking Blocks -- Checkers -- Inter-process communication and synchronization -- Utility System tasks and functions. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book provides a hands-on, application-oriented guide to the entire IEEE standard 1800 SystemVerilog language. Readers will benefit from the step-by-step approach to learning the language and methodology nuances, which will enable them to design and verify complex ASIC/SoC and CPU chips. The author covers the entire spectrum of the language, including random constraints, SystemVerilog Assertions, Functional Coverage, Class, checkers, interfaces, and Data Types, among other features of the language. Written by an experienced, professional end-user of ASIC/SoC/CPU and FPGA designs, this book explains each concept with easy to understand examples, simulation logs and applications derived from real projects. Readers will be empowered to tackle the complex task of multi-million gate ASIC designs. Provides comprehensive coverage of the entire IEEE standard SystemVerilog language; Covers important topics such as constrained random verification, SystemVerilog Class, Assertions, Functional coverage, data types, checkers, interfaces, processes and procedures, among other language features; Uses easy to understand examples and simulation logs; examples are simulatable and will be provided online; Written by an experienced, professional end-user of ASIC/SoC/CPU and FPGA designs. This is quite a comprehensive work. It must have taken a long time to write it. I really like that the author has taken apart each of the SystemVerilog constructs and talks about them in great detail, including example code and simulation logs. For example, there is a chapter dedicated to arrays, and another dedicated to queues - that is great to have! The Language Reference Manual (LRM) is quite dense and difficult to use as a text for learning the language. This book explains semantics at a level of detail that is not possible in an LRM. This is the strength of the book. This will be an excellent book for novice users and as a handy reference for experienced programmers. Mark Glasser Cerebras Systems. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-030-71319-5 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2021. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Embedded computer systems. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer architecture. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Embedded Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Processor Architectures. |
| 912 ## - | |
| -- | ZDB-2-ENG |
| 912 ## - | |
| -- | ZDB-2-SXE |
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