Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures (Record no. 77458)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03834nam a22005415i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-030-31310-4 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220801215416.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 191220s2020 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783030313104 |
| -- | 978-3-030-31310-4 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Manna, Kanchan. |
| 245 10 - TITLE STATEMENT | |
| Title | Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2020. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XII, 162 p. 31 illus., 8 illus. in color. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Introduction to Network-on-Chip Designs and Tests -- Iterative Mapping with Through Silicon Via (TSV) placement for 3D-NoC-based multicore systems -- A constructive Heuristic for integrated mapping and TSV Placement for 3D-NoC-based multicore systems -- Discrete Particle Swarm Optimization for integrated mapping and TSV Placement for 3D-NoC-based multicore systems -- Temperature-aware application mapping strategy for 2D-NoC-based multicore systems -- Temperature-aware design strategy for 3D-NoC-based multicore systems -- Temperature-aware test strategy for 2D as well as 3D-NoC-based multicore systems. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems. It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors describe the use of the Integer Line Programming (ILP) technique for smaller benchmarks and a Particle Swarm Optimization (PSO) to get a near optimal mapping and test schedule for bigger benchmarks. The PSO-based approach is also augmented with several innovative techniques to get the best possible solution. The tradeoff between performance (communication or test time) of the system and thermal-safety is also discussed, based on designer specifications. Provides a single-source reference to design and test for circuit and system-level approaches to (NoC) based multicore systems; Gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling in (NoC) based multicore systems; Organizes chapters systematically and hierarchically, rather than in an ad hoc manner, covering aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Mathew, Jimson. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-030-31310-4 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2020. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer architecture. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronics. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Processor Architectures. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronics and Microelectronics, Instrumentation. |
| 912 ## - | |
| -- | ZDB-2-ENG |
| 912 ## - | |
| -- | ZDB-2-SXE |
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