Formal Verification of Floating-Point Hardware Design (Record no. 77506)

000 -LEADER
fixed length control field 04698nam a22005535i 4500
001 - CONTROL NUMBER
control field 978-3-319-95513-1
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20220801215443.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 181013s2019 sz | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783319955131
-- 978-3-319-95513-1
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Russinoff, David M.
245 10 - TITLE STATEMENT
Title Formal Verification of Floating-Point Hardware Design
Sub Title A Mathematical Approach /
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2019.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XXIV, 382 p. 32 illus.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 1 Basic Arithmetic Functions -- 2 Bit Vectors -- 3 Logical Operations -- 4 Floating-Point Numbers -- 5 Floating-Point Formats -- 6 Rounding -- 7 IEEE-Compliant Square Root -- 8 Addition -- 9 Multiplication -- 10 SRT Division and Square Root -- 11 FMA-Based Division -- 12 SSE Floating-Point Instructions -- 13 x87 Instructions -- 14 Arm Floating-Point Instructions -- 15 The Modeling Language -- 16 Double-Precision Multiplication -- 17 Double-Precision Addition and FMA -- 18 Multi-Precision Radix-4 SRT Division -- 19 Multi-Precision Radix-4 SRT Square Root.
520 ## - SUMMARY, ETC.
Summary, etc This is the first book to focus on the problem of ensuring the correctness of floating-point hardware designs through mathematical methods. Formal Verification of Floating-Point Hardware Design advances a verification methodology based on a unified theory of register-transfer logic and floating-point arithmetic that has been developed and applied to the formal verification of commercial floating-point units over the course of more than two decades, during which the author was employed by several major microprocessor design companies. The book consists of five parts, the first two of which present a rigorous exposition of the general theory based on the first principles of arithmetic. Part I covers bit vectors and the bit manipulation primitives, integer and fixed-point encodings, and bit-wise logical operations. Part II addresses the properties of floating-point numbers, the formats in which they are encoded as bit vectors, and the various modes of floating-point rounding. In Part III, the theory is extended to the analysis of several algorithms and optimization techniques that are commonly used in commercial implementations of elementary arithmetic operations. As a basis for the formal verification of such implementations, Part IV contains high-level specifications of correctness of the basic arithmetic instructions of several major industry-standard floating-point architectures, including all details pertaining to the handling of exceptional conditions. Part V illustrates the methodology, applying the preceding theory to the comprehensive verification of a state-of-the-art commercial floating-point unit. All of these results have been formalized in the logic of the ACL2 theorem prover and mechanically checked to ensure their correctness. They are presented here, however, in simple conventional mathematical notation. The book presupposes no familiarity with ACL2, logic design, or any mathematics beyond basic high school algebra. It will be of interest to verification engineers as well as arithmetic circuit designers who appreciate the value of a rigorous approach to their art, and is suitable as a graduate text in computer arithmetic. .
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-3-319-95513-1
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2019.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Software engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computer architecture.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computers.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Software Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Hardware Performance and Reliability.
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-- ZDB-2-ENG
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-- ZDB-2-SXE

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