Enhanced Virtual Prototyping (Record no. 78014)

000 -LEADER
fixed length control field 04000nam a22005415i 4500
001 - CONTROL NUMBER
control field 978-3-030-54828-5
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20220801215928.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 201014s2021 sz | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783030548285
-- 978-3-030-54828-5
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Herdt, Vladimir.
245 10 - TITLE STATEMENT
Title Enhanced Virtual Prototyping
Sub Title Featuring RISC-V Case Studies /
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2021.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XXI, 247 p. 90 illus., 75 illus. in color.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction -- Preliminaries -- An Open-Source RISC-V Evaluation Platform -- Formal Verification of SystemC-based Designs using Symbolic Simulation -- Coverage-guided Testing for Scalable Virtual Prototype Verification -- Verification of Embedded Software Binaries using Virtual Prototypes -- Validation of Firmware-Based Power Management using Virtual Prototypes -- Register-Transfer Level Correspondence Analysis -- Conclusion -- Index.
520 ## - SUMMARY, ETC.
Summary, etc This book presents a comprehensive set of techniques that enhance all key aspects of a modern Virtual Prototype (VP)-based design flow. The authors emphasize automated formal verification methods, as well as advanced coverage-guided analysis and testing techniques, tailored for SystemC-based VPs and also the associated Software (SW). Coverage also includes VP modeling techniques that handle functional as well as non-functional aspects and also describes correspondence analyses between the Hardware- and VP-level to utilize information available at different levels of abstraction. All approaches are discussed in detail and are evaluated extensively, using several experiments to demonstrate their effectiveness in enhancing the VP-based design flow. Furthermore, the book puts a particular focus on the modern RISC-V ISA, with several case-studies covering modeling as well as VP and SW verification aspects. Provides a comprehensive set of techniques to enhance all key aspects of a Virtual Prototype (VP)-based design flow Includes automated formal verification methods and advanced coverage-guided testing techniques, tailored for SystemC-based VPs Describes efficient, coverage-guided test generation methods for VP-based functional and non-functional software (SW) analysis and verification Includes correspondence analyses to utilize information between different abstraction levels in the design flow Uses several VP and SW verification case-studies that target the modern RISC-V ISA.
700 1# - AUTHOR 2
Author 2 Große, Daniel.
700 1# - AUTHOR 2
Author 2 Drechsler, Rolf.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-3-030-54828-5
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2021.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Embedded computer systems.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Cooperating objects (Computer systems).
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Embedded Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Cyber-Physical Systems.
912 ## -
-- ZDB-2-ENG
912 ## -
-- ZDB-2-SXE

No items available.