Parasitic Substrate Coupling in High Voltage Integrated Circuits (Record no. 79569)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 04078nam a22005535i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-319-74382-0 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220801221338.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 180314s2018 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783319743820 |
| -- | 978-3-319-74382-0 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Buccella, Pietro. |
| 245 10 - TITLE STATEMENT | |
| Title | Parasitic Substrate Coupling in High Voltage Integrated Circuits |
| Sub Title | Minority and Majority Carriers Propagation in Semiconductor Substrate / |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2018. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XVII, 183 p. 124 illus., 73 illus. in color. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Analog Circuits and Signal Processing, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Chapter1: Overview of Parasitic Substrate Coupling -- Chapter2: Design Challenges in High Voltage ICs -- Chapter3: Substrate Modeling with Parasitic Transistors -- Chapter4: TCAD Validation of the Model -- Chapter5: Extraction Tool for the Substrate Network -- Chapter6: Parasitic Bipolar Transistors in Benchmark Structures -- Chapter7: Substrate Coupling Analysis and Evaluation of Protection Strategies. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book introduces a new approach to model and predict substrate parasitic failures in integrated circuits with standard circuit design tools. The injection of majority and minority carriers in the substrate is a recurring problem in smart power ICs containing high voltage, high current switching devices besides sensitive control, protection and signal processing circuits. The injection of parasitic charges leads to the activation of substrate bipolar transistors. This book explores how these events can be evaluated for a wide range of circuit topologies. To this purpose, new generalized devices implemented in Verilog-A are used to model the substrate with standard circuit simulators. This approach was able to predict for the first time the activation of a latch-up in real circuits through post-layout SPICE simulation analysis. Discusses substrate modeling and circuit-level simulation of parasitic bipolar device coupling effects in integrated circuits; Includes circuit back-annotation of the parasitic lateral n-p-n and vertical p-n-p bipolar transistors in the substrate; Uses Spice for simulation and characterization of parasitic bipolar transistors, latch-up of the parasitic p-n-p-n structure, and electrostatic discharge (ESD) protection devices; Offers design guidelines to reduce couplings by adding specific test protections. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Stefanucci, Camillo. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Kayal, Maher. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Sallese, Jean-Michel. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-319-74382-0 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2018. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronics. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronics and Microelectronics, Instrumentation. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 2197-1854 |
| 912 ## - | |
| -- | ZDB-2-ENG |
| 912 ## - | |
| -- | ZDB-2-SXE |
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