Hardware Security and Trust (Record no. 80989)

000 -LEADER
fixed length control field 04293nam a22005655i 4500
001 - CONTROL NUMBER
control field 978-3-319-44318-8
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20220801222631.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 170113s2017 sz | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783319443188
-- 978-3-319-44318-8
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
245 10 - TITLE STATEMENT
Title Hardware Security and Trust
Sub Title Design and Deployment of Integrated Circuits in a Threatened Environment /
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2017.
300 ## - PHYSICAL DESCRIPTION
Number of Pages X, 254 p. 99 illus., 47 illus. in color.
505 0# - FORMATTED CONTENTS NOTE
Remark 2 AES Datapaths on FPGAs: a State of the Art Analysis -- Fault Attacks, Injection Techniques and Tools for Simulation -- Recent developments in side-channel analysis on Elliptic Curve Cryptography implementations -- Practical Session: Differential Power Analysis for Beginners -- Fault and Power Analysis Attack Protection Techniques for Standardized Public Key Cryptosystems -- Scan Design: Basics, Advancements and Vulnerabilities -- Manufacturing Testing & Security Countermeasures -- Malware Threats and Solutions for Trustworthy Mobile Systems Design -- Ring Oscillators and Hardware Trojan Detection -- Notions on Silicon Physically Unclonable Functions -- Implementation of delay-based PUFs on Altera FPGAs -- Implementation and Analysis of Ring Oscillator Circuits on Xilinx FPGAs.-.
520 ## - SUMMARY, ETC.
Summary, etc This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given circuit into a secure design incorporating counter-measures against fault attacks. In order to address the conflict between testability and security, the authors describe innovative design-for-testability (DFT) computer-aided design (CAD) tools that support security challenges, engineered for compliance with existing, commercial tools. Secure protocols are discussed, which protect access to necessary test infrastructures and enable the design of secure access controllers. Covers all aspects of hardware security including design, manufacturing, testing, reliability, validation and utilization; Describes new methods and algorithms for the identification/detection of hardware trojans; Defines new architectures capable of detecting faults and resisting fault attacks; Establishes a design and synthesis flow to transform a given circuit into a secure design, incorporating counter-measures against fault attacks.
700 1# - AUTHOR 2
Author 2 Sklavos, Nicolas.
700 1# - AUTHOR 2
Author 2 Chaves, Ricardo.
700 1# - AUTHOR 2
Author 2 Di Natale, Giorgio.
700 1# - AUTHOR 2
Author 2 Regazzoni, Francesco.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-3-319-44318-8
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2017.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computer architecture.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics and Microelectronics, Instrumentation.
912 ## -
-- ZDB-2-ENG
912 ## -
-- ZDB-2-SXE

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