Introduction to Noise-Resilient Computing (Record no. 84674)

000 -LEADER
fixed length control field 04350nam a22005895i 4500
001 - CONTROL NUMBER
control field 978-3-031-79855-9
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20240730163509.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 220601s2013 sz | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783031798559
-- 978-3-031-79855-9
082 04 - CLASSIFICATION NUMBER
Call Number 620
100 1# - AUTHOR NAME
Author Yanushkevich, Svetlana N.
245 10 - TITLE STATEMENT
Title Introduction to Noise-Resilient Computing
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Edition statement 1st ed. 2013.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XIX, 132 p.
490 1# - SERIES STATEMENT
Series statement Synthesis Lectures on Digital Circuits & Systems,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction to probabilistic computation models -- Nanoscale circuits and fluctuation problems -- Estimators and Metrics -- MRF Models of Logic Gates -- Neuromorphic models -- Noise-tolerance via error correcting -- Conclusion and future work.
520 ## - SUMMARY, ETC.
Summary, etc Noise abatement is the key problem of small-scaled circuit design. New computational paradigms are needed -- as these circuits shrink, they become very vulnerable to noise and soft errors. In this lecture, we present a probabilistic computation framework for improving the resiliency of logic gates and circuits under random conditions induced by voltage or current fluctuation. Among many probabilistic techniques for modeling such devices, only a few models satisfy the requirements of efficient hardware implementation -- specifically, Boltzman machines and Markov Random Field (MRF) models. These models have similar built-in noise-immunity characteristics based on feedback mechanisms. In probabilistic models, the values 0 and 1 of logic functions are replaced by degrees of beliefs that these values occur. An appropriate metric for degree of belief is probability. We discuss various approaches for noise-resilient logic gate design, and propose a novel design taxonomy based on implementation of the MRF model by a new type of binary decision diagram (BDD), called a cyclic BDD. In this approach, logic gates and circuits are designed using 2-to-1 bi-directional switches. Such circuits are often modeled using Shannon expansions with the corresponding graph-based implementation, BDDs. Simulation experiments are reported to show the noise immunity of the proposed structures. Audiences who may benefit from this lecture include graduate students taking classes on advanced computing device design, and academic and industrial researchers. Table of Contents: Introduction to probabilistic computation models / Nanoscale circuits and fluctuation problems / Estimators and Metrics / MRF Models of Logic Gates / Neuromorphic models / Noise-tolerance via error correcting / Conclusion and future work.
700 1# - AUTHOR 2
Author 2 Kasai, Seiya.
700 1# - AUTHOR 2
Author 2 Tangim, Golam.
700 1# - AUTHOR 2
Author 2 Tran, A.H.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-3-031-79855-9
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
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-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2013.
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-- txt
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-- computer
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-- rdamedia
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-- online resource
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-- text file
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650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Engineering.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
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-- Control engineering.
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-- Robotics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Automation.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computers.
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-- Technology and Engineering.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Control, Robotics, Automation.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computer Hardware.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 1932-3174
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