Performance Analysis and Tuning for General Purpose Graphics Processing Units (GPGPU) (Record no. 84863)

000 -LEADER
fixed length control field 04024nam a22005415i 4500
001 - CONTROL NUMBER
control field 978-3-031-01737-7
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20240730163655.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 220601s2012 sz | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783031017377
-- 978-3-031-01737-7
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Kim, Hyesoon.
245 10 - TITLE STATEMENT
Title Performance Analysis and Tuning for General Purpose Graphics Processing Units (GPGPU)
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2012.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XII, 88 p.
490 1# - SERIES STATEMENT
Series statement Synthesis Lectures on Computer Architecture,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 GPU Design, Programming, and Trends -- Performance Principles -- From Principles to Practice: Analysis and Tuning -- Using Detailed Performance Analysis to Guide Optimization.
520 ## - SUMMARY, ETC.
Summary, etc General-purpose graphics processing units (GPGPU) have emerged as an important class of shared memory parallel processing architectures, with widespread deployment in every computer class from high-end supercomputers to embedded mobile platforms. Relative to more traditional multicore systems of today, GPGPUs have distinctly higher degrees of hardware multithreading (hundreds of hardware thread contexts vs. tens), a return to wide vector units (several tens vs. 1-10), memory architectures that deliver higher peak memory bandwidth (hundreds of gigabytes per second vs. tens), and smaller caches/scratchpad memories (less than 1 megabyte vs. 1-10 megabytes). In this book, we provide a high-level overview of current GPGPU architectures and programming models. We review the principles that are used in previous shared memory parallel platforms, focusing on recent results in both the theory and practice of parallel algorithms, and suggest a connection to GPGPU platforms. We aim to provide hints to architects about understanding algorithm aspect to GPGPU. We also provide detailed performance analysis and guide optimizations from high-level algorithms to low-level instruction level optimizations. As a case study, we use n-body particle simulations known as the fast multipole method (FMM) as an example. We also briefly survey the state-of-the-art in GPU performance analysis tools and techniques. Table of Contents: GPU Design, Programming, and Trends / Performance Principles / From Principles to Practice: Analysis and Tuning / Using Detailed Performance Analysis to Guide Optimization.
700 1# - AUTHOR 2
Author 2 Vuduc, Richard.
700 1# - AUTHOR 2
Author 2 Baghsorkhi, Sara.
700 1# - AUTHOR 2
Author 2 Choi, Jee.
700 1# - AUTHOR 2
Author 2 Hwu, Wen-mei W.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-3-031-01737-7
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2012.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computer architecture.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 1935-3243
912 ## -
-- ZDB-2-SXSC

No items available.