Innovations in the Memory System (Record no. 84899)

000 -LEADER
fixed length control field 03178nam a22005055i 4500
001 - CONTROL NUMBER
control field 978-3-031-01763-6
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20240730163716.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 220601s2019 sz | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9783031017636
-- 978-3-031-01763-6
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Balasubramonian, Rajeev.
245 10 - TITLE STATEMENT
Title Innovations in the Memory System
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2019.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XXI, 129 p.
490 1# - SERIES STATEMENT
Series statement Synthesis Lectures on Computer Architecture,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 List of Figures -- List of Tables -- Preface -- Acknowledgments -- Introduction -- Memory System Basics for Every Architect -- Commercial Memory Products -- Memory Scheduling -- Data Placement -- Memory Chip Microarchitectures -- Memory Channels -- Memory Reliability -- Memory Refresh -- Near Data Processing -- Memory Security -- Closing Thoughts -- Bibliography -- Author's Biography.
520 ## - SUMMARY, ETC.
Summary, etc The memory system has the potential to be a hub for future innovation. While conventional memory systems focused primarily on high density, other memory system metrics like energy, security, and reliability are grabbing modern research headlines. With processor performance stagnating, it is also time to consider new programming models that move some application computations into the memory system. This, in turn, will lead to feature-rich memory systems with new interfaces. The past decade has seen a number of memory system innovations that point to this future where the memory system will be much more than dense rows of unintelligent bits. This book takes a tour through recent and prominent research works, touching upon new DRAM chip designs and technologies, near data processing approaches, new memory channel architectures, techniques to tolerate the overheads of refresh and fault tolerance, security attacks and mitigations, and memory scheduling.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-3-031-01763-6
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2019.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Computer architecture.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Processor Architectures.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 1935-3243
912 ## -
-- ZDB-2-SXSC

No items available.