Structural Decision Diagrams in Digital Test (Record no. 87397)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 04678nam a22006015i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-031-44734-1 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240730171115.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 240129s2024 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783031447341 |
| -- | 978-3-031-44734-1 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 003.3 |
| 100 1# - AUTHOR NAME | |
| Author | Ubar, Raimund. |
| 245 10 - TITLE STATEMENT | |
| Title | Structural Decision Diagrams in Digital Test |
| Sub Title | Theory and Applications / |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2024. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XIII, 595 p. 318 illus., 62 illus. in color. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Computer Science Foundations and Applied Logic, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | Chapter 1: Introduction -- Chapter 2: Overview of structural decision diagrams -- Chapter 3: Structurally Synthesized Binary Decision Diagrams -- Chapter 4: Fault modeling in digital circuits -- Chapter 5: Logic-level fault simulation -- Chapter 6: Test generation, fault diagnosis and testability -- Chapter 7: High-Level Decision Diagrams -- Chapter 8: Test generation for microprocessors with HLDDs. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This is the first book that sums up test-related modeling of digital circuits and systems by a new structural-decision-diagrams model. The model represents structural and functional information jointly and opens a new area of research. The book introduces and discusses applications of two types of structural decision diagrams (DDs): low-level, structurally synthesized binary DDs (SSBDDs) and high-level DDs (HLDDs) that enable diagnostic modeling of complex digital circuits and systems. Topics and features: Provides the definition, properties and techniques for synthesis, compression and optimization of SSBDDs and HLDDs Provides numerous working examples that illustrate the key points of the text Describes applications of SSBDDs and HLDDs for various electronic design automation (EDA) tasks, such as logic-level fault modeling and simulation, multi-valued simulation, timing-critical path identification, and test generation Discusses the advantages of the proposed model to traditional binary decision diagrams and other traditional design representations Combines SSBDDs with HLDDs for multi-level representation of digital systems for enabling hierarchical and cross-level solving of complex test-related tasks This unique book is aimed at researchers working in the fields of computer science and computer engineering, focusing on test, diagnosis and dependability of digital systems. It can also serve as a reference for graduate- and advanced undergraduate-level computer engineering and electronics courses. Three authors are affiliated with the Dept. of Computer Systems at the Tallinn University of Technology, Estonia: Raimund Ubar is a retired Professor, Jaan Raik and Maksim Jenihhin are tenured Professors. Artur Jutman, PhD, is a researcher at the same university and the CEO of TestonicaLab Ltd., Estonia. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Raik, Jaan. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Jenihhin, Maksim. |
| 700 1# - AUTHOR 2 | |
| Author 2 | Jutman, Artur. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-031-44734-1 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer Nature Switzerland : |
| -- | Imprint: Birkhäuser, |
| -- | 2024. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
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| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer simulation. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Operations research. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer Modelling. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer Science Logic and Foundations of Programming. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Operations Research and Decision Theory. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 2731-5762 |
| 912 ## - | |
| -- | ZDB-2-SCS |
| 912 ## - | |
| -- | ZDB-2-SXCS |
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