LOGIC SYNTHESIS AND VERIFICATION ALGORITHMS
By: HACHTEL,G D.
Material type: BookPublisher: Boston Kluwer Academic 1996Description: 564p.,26X18.ISBN: 0792397460.DDC classification: 621.381 73 H117Item type | Current location | Call number | Status | Date due | Barcode |
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Books | CENTRAL LIBRARY | 621.381 73 H117 (Browse shelf) | Available | 063659 |
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621.381 52 S617 SEMICONDUCTOR OPTOELECTRONICS | 621.381 522 T 766 EXPERIMENTER'S GUIDE TO SOLID STATE DIODES | 621.381 53 N578 HIGH-FREQUENCY CIRCUITS ENGINEERING | 621.381 73 H117 LOGIC SYNTHESIS AND VERIFICATION ALGORITHMS | 621.381 73 W146 DIGITAL DESIGN PRINCIPLES AND PRACTICES | 621.381 75 C552 LINEAR INTEGRATED CIRCUITS | 621.381 75 C552 LINEAR INTEGRATED CIRCUITS |
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