Central Library

Normal view MARC view ISBD view

Energy-Efficient Communication Processors [electronic resource] : Design and Implementation for Emerging Wireless Systems / by Robert Fasthuber, Francky Catthoor, Praveen Raghavan, Frederik Naessens.

By: Fasthuber, Robert [author.].
Contributor(s): Catthoor, Francky [author.] | Raghavan, Praveen [author.] | Naessens, Frederik [author.] | SpringerLink (Online service).
Material type: materialTypeLabelBookPublisher: New York, NY : Springer New York : Imprint: Springer, 2013Description: XXII, 289 p. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9781461449928.Subject(s): Engineering | Microprocessors | Electronics | Microelectronics | Electronic circuits | Engineering | Circuits and Systems | Processor Architectures | Electronics and Microelectronics, InstrumentationAdditional physical formats: Printed edition:: No titleDDC classification: 621.3815 Online resources: Click here to access online
Contents:
Context and State-of-the-Art -- Processor Template for the Wireless Domain -- Case Study 1: MIMO Detector -- Case Study 2: FIR Filter -- Case study 3: FFT -- Front-End Design for the Processor Template -- Back-End Design for the Processor Template.
In: Springer eBooksSummary: This book describes a new design approach for energy-efficient, Domain-Specific Instruction set Processor (DSIP) architectures for the wireless baseband domain. The innovative techniques presented enable co-design of algorithms, architectures and technology, for efficient implementation of the most advanced technologies. To demonstrate the feasibility of the author's design approach, case studies are included for crucial functionality of advanced wireless systems with increased computational performance, flexibility and reusability. Designers using this approach will benefit from reduced development/product costs and greater scalability to future process technology nodes. Describes a DSIP architecture explicitly for the wireless domain, significantly more efficient than methods commonly in use; Includes an efficient DSIP architecture template, which can be reused for specific designs; Uses holistic design approach, considering all relevant requirements and combining many innovative/disruptive design concepts; Enables design portability, given changing target devices.
    average rating: 0.0 (0 votes)
No physical items for this record

Context and State-of-the-Art -- Processor Template for the Wireless Domain -- Case Study 1: MIMO Detector -- Case Study 2: FIR Filter -- Case study 3: FFT -- Front-End Design for the Processor Template -- Back-End Design for the Processor Template.

This book describes a new design approach for energy-efficient, Domain-Specific Instruction set Processor (DSIP) architectures for the wireless baseband domain. The innovative techniques presented enable co-design of algorithms, architectures and technology, for efficient implementation of the most advanced technologies. To demonstrate the feasibility of the author's design approach, case studies are included for crucial functionality of advanced wireless systems with increased computational performance, flexibility and reusability. Designers using this approach will benefit from reduced development/product costs and greater scalability to future process technology nodes. Describes a DSIP architecture explicitly for the wireless domain, significantly more efficient than methods commonly in use; Includes an efficient DSIP architecture template, which can be reused for specific designs; Uses holistic design approach, considering all relevant requirements and combining many innovative/disruptive design concepts; Enables design portability, given changing target devices.

There are no comments for this item.

Log in to your account to post a comment.
Close