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Design and Analysis of Spiral Inductors [electronic resource] / by Genemala Haobijam, Roy Paily Palathinkal.

By: Haobijam, Genemala [author.].
Contributor(s): Palathinkal, Roy Paily [author.] | SpringerLink (Online service).
Material type: materialTypeLabelBookPublisher: New Delhi : Springer India : Imprint: Springer, 2014Description: XIV, 107 p. 69 illus. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9788132215158.Subject(s): Engineering | Microwaves | Optical engineering | Electronics | Microelectronics | Electronic circuits | Engineering | Electronics and Microelectronics, Instrumentation | Microwaves, RF and Optical Engineering | Circuits and SystemsAdditional physical formats: Printed edition:: No titleDDC classification: 621.381 Online resources: Click here to access online
Contents:
Introduction -- Optimization of Spiral Inductor with Bounding of Layout Parameters -- Multilayer Pyramidal Symmetric Inductor -- Implementation of the MPS in Voltage Controlled Oscillator -- References -- Index.
In: Springer eBooksSummary: The book addresses the critical challenges faced by the ever-expanding wireless communication market and the increasing frequency of operation due to continuous innovation of high performance integrated passive devices. The challenges like low quality factor, design complexity, manufacturability, processing cost, etc., are studied with examples and specifics. Silicon on-chip inductor was first reported in 1990 by Nguyen and Meyer in a 0.8 (So(Bm silicon bipolar complementary metal oxide semiconductor technology (BiCMOS). Since then, there has been an enormous progress in the research on the performance trends, design and optimization, modeling, quality factor enhancement techniques, etc., of spiral inductors and significant results are reported in literature for various applications. This book introduces an efficient method of determining the optimized layout of on chip spiral inductor. The important fundamental tradeoffs of the design like quality factor and area, quality factor and inductance, quality factor and operating frequency, maximum quality factor and the peak frequency is also explored. The authors proposed an algorithm for accurate design and optimization of spiral inductors using a 3D electromagnetic simulator with minimum number of inductor structure simulations and thereby reducing its long computation time. A new multilayer pyramidal symmetric inductor structure is also proposed in this book. Being multilevel, the proposed inductor achieves high inductance to area ratio and hence occupies smaller silicon area.
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Introduction -- Optimization of Spiral Inductor with Bounding of Layout Parameters -- Multilayer Pyramidal Symmetric Inductor -- Implementation of the MPS in Voltage Controlled Oscillator -- References -- Index.

The book addresses the critical challenges faced by the ever-expanding wireless communication market and the increasing frequency of operation due to continuous innovation of high performance integrated passive devices. The challenges like low quality factor, design complexity, manufacturability, processing cost, etc., are studied with examples and specifics. Silicon on-chip inductor was first reported in 1990 by Nguyen and Meyer in a 0.8 (So(Bm silicon bipolar complementary metal oxide semiconductor technology (BiCMOS). Since then, there has been an enormous progress in the research on the performance trends, design and optimization, modeling, quality factor enhancement techniques, etc., of spiral inductors and significant results are reported in literature for various applications. This book introduces an efficient method of determining the optimized layout of on chip spiral inductor. The important fundamental tradeoffs of the design like quality factor and area, quality factor and inductance, quality factor and operating frequency, maximum quality factor and the peak frequency is also explored. The authors proposed an algorithm for accurate design and optimization of spiral inductors using a 3D electromagnetic simulator with minimum number of inductor structure simulations and thereby reducing its long computation time. A new multilayer pyramidal symmetric inductor structure is also proposed in this book. Being multilevel, the proposed inductor achieves high inductance to area ratio and hence occupies smaller silicon area.

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