Normal view MARC view ISBD view

Hardware IP Security and Trust [electronic resource] / edited by Prabhat Mishra, Swarup Bhunia, Mark Tehranipoor.

Contributor(s): Mishra, Prabhat [editor.] | Bhunia, Swarup [editor.] | Tehranipoor, Mark [editor.] | SpringerLink (Online service).
Material type: materialTypeLabelBookPublisher: Cham : Springer International Publishing : Imprint: Springer, 2017Edition: 1st ed. 2017.Description: XII, 353 p. 131 illus., 78 illus. in color. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9783319490250.Subject(s): Electronic circuits | Cryptography | Data encryption (Computer science) | Data protection | Electronics | Microprocessors | Computer architecture | Electronic Circuits and Systems | Cryptology | Data and Information Security | Electronics and Microelectronics, Instrumentation | Processor ArchitecturesAdditional physical formats: Printed edition:: No title; Printed edition:: No title; Printed edition:: No titleDDC classification: 621.3815 Online resources: Click here to access online
Contents:
Part I. Introduction -- Chapter 1.Security and Trust Vulnerabilities in Third-party IPs -- PArt II.Trust Analysis -- Chapter 2.Security Rule Check -- Chapter 3.Digital Circuit Vulnerabilities to Hardware Trojans -- Chapter 4.Code Coverage Analysis for IP Trust Verification -- Chapter 5.Analyzing Circuit Layout to Probing Attack -- Chapter 6.Testing of Side Channel Leakage of Cryptographic IPs: Metrics and Evaluations -- Part III -- Effective Countermeasures -- Chapter 7.Hardware Hardening Approaches using Camouflaging, Encryption and Obfuscation -- Chapter 8.A Novel Mutating Runtime Architecture for Embedding Multiple Countermeasures Against Passive Side Channel Attacks -- Part IV -- Chapter 9.Validation of IP Security and Trust -- Chapter 10.IP Trust Validation using Proof-carrying Hardware -- Chapter 11. Hardware Trust Verification -- Chapter 12.Verification of Unspecified IP Functionality -- Chapter 13.Verifying Security Properties in Modern SoCs using Instruction-level Abstractions -- Chapter 14. Test Generation for Detection of Malicious Parametric Variations -- Part V. Conclusions -- Chapter 15.The Future of Trustworthy SoC Design.
In: Springer Nature eBookSummary: This book provides an overview of current Intellectual Property (IP) based System-on-Chip (SoC) design methodology and highlights how security of IP can be compromised at various stages in the overall SoC design-fabrication-deployment cycle. Readers will gain a comprehensive understanding of the security vulnerabilities of different types of IPs. This book would enable readers to overcome these vulnerabilities through an efficient combination of proactive countermeasures and design-for-security solutions, as well as a wide variety of IP security and trust assessment and validation techniques. This book serves as a single-source of reference for system designers and practitioners for designing secure, reliable and trustworthy SoCs.
    average rating: 0.0 (0 votes)
No physical items for this record

Part I. Introduction -- Chapter 1.Security and Trust Vulnerabilities in Third-party IPs -- PArt II.Trust Analysis -- Chapter 2.Security Rule Check -- Chapter 3.Digital Circuit Vulnerabilities to Hardware Trojans -- Chapter 4.Code Coverage Analysis for IP Trust Verification -- Chapter 5.Analyzing Circuit Layout to Probing Attack -- Chapter 6.Testing of Side Channel Leakage of Cryptographic IPs: Metrics and Evaluations -- Part III -- Effective Countermeasures -- Chapter 7.Hardware Hardening Approaches using Camouflaging, Encryption and Obfuscation -- Chapter 8.A Novel Mutating Runtime Architecture for Embedding Multiple Countermeasures Against Passive Side Channel Attacks -- Part IV -- Chapter 9.Validation of IP Security and Trust -- Chapter 10.IP Trust Validation using Proof-carrying Hardware -- Chapter 11. Hardware Trust Verification -- Chapter 12.Verification of Unspecified IP Functionality -- Chapter 13.Verifying Security Properties in Modern SoCs using Instruction-level Abstractions -- Chapter 14. Test Generation for Detection of Malicious Parametric Variations -- Part V. Conclusions -- Chapter 15.The Future of Trustworthy SoC Design.

This book provides an overview of current Intellectual Property (IP) based System-on-Chip (SoC) design methodology and highlights how security of IP can be compromised at various stages in the overall SoC design-fabrication-deployment cycle. Readers will gain a comprehensive understanding of the security vulnerabilities of different types of IPs. This book would enable readers to overcome these vulnerabilities through an efficient combination of proactive countermeasures and design-for-security solutions, as well as a wide variety of IP security and trust assessment and validation techniques. This book serves as a single-source of reference for system designers and practitioners for designing secure, reliable and trustworthy SoCs.

There are no comments for this item.

Log in to your account to post a comment.