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In-/Near-Memory Computing [electronic resource] / by Daichi Fujiki, Xiaowei Wang, Arun Subramaniyan, Reetuparna Das.

By: Fujiki, Daichi [author.].
Contributor(s): Wang, Xiaowei [author.] | Subramaniyan, Arun [author.] | Das, Reetuparna [author.] | SpringerLink (Online service).
Material type: materialTypeLabelBookSeries: Synthesis Lectures on Computer Architecture: Publisher: Cham : Springer International Publishing : Imprint: Springer, 2021Edition: 1st ed. 2021.Description: XV, 124 p. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9783031017728.Subject(s): Electronic circuits | Microprocessors | Computer architecture | Electronic Circuits and Systems | Processor ArchitecturesAdditional physical formats: Printed edition:: No title; Printed edition:: No title; Printed edition:: No titleDDC classification: 621.3815 Online resources: Click here to access online
Contents:
Preface -- Acknowledgments -- Introduction -- Technology Basics and Taxonomy -- Computing with DRAMs -- Computing with SRAMs -- Computing with Non-Volatile Memories -- Domain-Specific Accelerators -- Programming Models -- Closing Thoughts -- Bibliography -- Authors' Biographies.
In: Springer Nature eBookSummary: This book provides a structured introduction of the key concepts and techniques that enable in-/near-memory computing. For decades, processing-in-memory or near-memory computing has been attracting growing interest due to its potential to break the memory wall. Near-memory computing moves compute logic near the memory, and thereby reduces data movement. Recent work has also shown that certain memories can morph themselves into compute units by exploiting the physical properties of the memory cells, enabling in-situ computing in the memory array. While in- and near-memory computing can circumvent overheads related to data movement, it comes at the cost of restricted flexibility of data representation and computation, design challenges of compute capable memories, and difficulty in system and software integration. Therefore, wide deployment of in-/near-memory computing cannot be accomplished without techniques that enable efficient mapping of data-intensive applications to such devices,without sacrificing accuracy or increasing hardware costs excessively. This book describes various memory substrates amenable to in- and near-memory computing, architectural approaches for designing efficient and reliable computing devices, and opportunities for in-/near-memory acceleration of different classes of applications.
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Preface -- Acknowledgments -- Introduction -- Technology Basics and Taxonomy -- Computing with DRAMs -- Computing with SRAMs -- Computing with Non-Volatile Memories -- Domain-Specific Accelerators -- Programming Models -- Closing Thoughts -- Bibliography -- Authors' Biographies.

This book provides a structured introduction of the key concepts and techniques that enable in-/near-memory computing. For decades, processing-in-memory or near-memory computing has been attracting growing interest due to its potential to break the memory wall. Near-memory computing moves compute logic near the memory, and thereby reduces data movement. Recent work has also shown that certain memories can morph themselves into compute units by exploiting the physical properties of the memory cells, enabling in-situ computing in the memory array. While in- and near-memory computing can circumvent overheads related to data movement, it comes at the cost of restricted flexibility of data representation and computation, design challenges of compute capable memories, and difficulty in system and software integration. Therefore, wide deployment of in-/near-memory computing cannot be accomplished without techniques that enable efficient mapping of data-intensive applications to such devices,without sacrificing accuracy or increasing hardware costs excessively. This book describes various memory substrates amenable to in- and near-memory computing, architectural approaches for designing efficient and reliable computing devices, and opportunities for in-/near-memory acceleration of different classes of applications.

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