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Fault Tolerant Computer Architecture [electronic resource] / by Daniel Sorin.

By: Sorin, Daniel [author.].
Contributor(s): SpringerLink (Online service).
Material type: materialTypeLabelBookSeries: Synthesis Lectures on Computer Architecture: Publisher: Cham : Springer International Publishing : Imprint: Springer, 2009Edition: 1st ed. 2009.Description: XII, 103 p. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9783031017230.Subject(s): Electronic circuits | Microprocessors | Computer architecture | Electronic Circuits and Systems | Processor ArchitecturesAdditional physical formats: Printed edition:: No title; Printed edition:: No titleDDC classification: 621.3815 Online resources: Click here to access online
Contents:
Introduction -- Error Detection -- Error Recovery -- Diagnosis -- Self-Repair -- The Future.
In: Springer Nature eBookSummary: For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry. Table of Contents: Introduction / Error Detection / Error Recovery / Diagnosis / Self-Repair / The Future.
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Introduction -- Error Detection -- Error Recovery -- Diagnosis -- Self-Repair -- The Future.

For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry. Table of Contents: Introduction / Error Detection / Error Recovery / Diagnosis / Self-Repair / The Future.

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