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Power-Efficient Computer Architectures [electronic resource] : Recent Advances / by Magnus Själander, Margaret Martonosi, Stefanos Kaxiras.

By: Själander, Magnus [author.].
Contributor(s): Martonosi, Margaret [author.] | Kaxiras, Stefanos [author.] | SpringerLink (Online service).
Material type: materialTypeLabelBookSeries: Synthesis Lectures on Computer Architecture: Publisher: Cham : Springer International Publishing : Imprint: Springer, 2015Edition: 1st ed. 2015.Description: XII, 88 p. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9783031017452.Subject(s): Electronic circuits | Microprocessors | Computer architecture | Electronic Circuits and Systems | Processor ArchitecturesAdditional physical formats: Printed edition:: No title; Printed edition:: No titleDDC classification: 621.3815 Online resources: Click here to access online
Contents:
Introduction -- Voltage and Frequency Management -- Heterogeneity and Specialization -- Communication and Memory Systems -- Conclusions -- Bibliography -- Authors' Biographies .
In: Springer Nature eBookSummary: As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power efficiency levels have heightened. Over the past ten years, architecture techniques for power efficiency have shifted from primarily focusing on module-level efficiencies, toward more holistic design styles based on parallelism and heterogeneity. This work highlights and synthesizes recent techniques and trends in power-efficient computer architecture. Table of Contents: Introduction / Voltage and Frequency Management / Heterogeneity and Specialization / Communication and Memory Systems / Conclusions / Bibliography / Authors' Biographies.
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Introduction -- Voltage and Frequency Management -- Heterogeneity and Specialization -- Communication and Memory Systems -- Conclusions -- Bibliography -- Authors' Biographies .

As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power efficiency levels have heightened. Over the past ten years, architecture techniques for power efficiency have shifted from primarily focusing on module-level efficiencies, toward more holistic design styles based on parallelism and heterogeneity. This work highlights and synthesizes recent techniques and trends in power-efficient computer architecture. Table of Contents: Introduction / Voltage and Frequency Management / Heterogeneity and Specialization / Communication and Memory Systems / Conclusions / Bibliography / Authors' Biographies.

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