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008			131126s2013 gw | s |||| 0|eng d
020			_a9783642450730 _9978-3-642-45073-0
024	7		_a10.1007/978-3-642-45073-0 _2doi
050		4	_aQA76.9.A73
050		4	_aQA76.9.S88
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072		7	_aCOM032000 _2bisacsh
072		7	_aCOM067000 _2bisacsh
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245	1	0	_aVLSI-SoC: From Algorithms to Circuits and System-on-Chip Design _h[electronic resource] : _b20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers / _cedited by Andreas Burg, Ayṣe Coṣkun, Matthew Guthaus, Srinivas Katkoori, Ricardo Reis.
264		1	_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2013.
300			_aX, 235 p. 121 illus. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
490	1		_aIFIP Advances in Information and Communication Technology, _x1868-4238 ; _v418
505	0		_aFPGA-Based High-Speed Authenticated Encryption System -- A Smart Memory Accelerated Computed Tomography Parallel Backprojection -- Trinocular Stereo Vision Using a Multi Level Hierarchical Classification Structure -- Spatially-Varying Image Warping: Evaluations and VLSI Implementations -- An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing -- Configurable Low-Latency Interconnect for Multi-core Clusters -- A Hexagonal Processor and Interconnect Topology for Many-Core Architecture with Dense On-Chip Networks -- Fault-Tolerant Techniques to Manage Yield and Power Constraints in Network-on-Chip Interconnections -- On the Automatic Generation of Software-Based Self-Test Programs for Functional Test and Diagnosis of VLIW Processors -- SEU-Aware Low-Power Memories Using a Multiple Supply Voltage Array Architecture -- CMOS Implementation of Threshold Gates with Hysteresis -- Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates.
520			_aThis book contains extended and revised versions of the best papers presented at the 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, held in Santa Cruz, CA, USA, in October 2012. The 12 papers included in the book were carefully reviewed and selected from the 33 full papers presented at the conference. The papers cover a wide range of topics in VLSI technology and advanced research. They address the current trend toward increasing chip integration and technology process advancements bringing about stimulating new challenges both at the physical and system-design levels, as well as in the test of these systems.
650		0	_aComputer science.
650		0	_aComputer hardware.
650		0	_aComputer organization.
650		0	_aArchitecture, Computer.
650	1	4	_aComputer Science.
650	2	4	_aComputer System Implementation.
650	2	4	_aComputer Hardware.
650	2	4	_aComputer Systems Organization and Communication Networks.
700	1		_aBurg, Andreas. _eeditor.
700	1		_aCoṣkun, Ayṣe. _eeditor.
700	1		_aGuthaus, Matthew. _eeditor.
700	1		_aKatkoori, Srinivas. _eeditor.
700	1		_aReis, Ricardo. _eeditor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9783642450723
830		0	_aIFIP Advances in Information and Communication Technology, _x1868-4238 ; _v418
856	4	0	_uhttp://dx.doi.org/10.1007/978-3-642-45073-0
912			_aZDB-2-SCS
942			_cEBK
999			_c52192 _d52192