000			03233nam a22004935i 4500
001			978-3-319-06340-9
003			DE-He213
005			20200420221257.0
007			cr nn 008mamaa
008			140707s2014 gw | s |||| 0|eng d
020			_a9783319063409 _9978-3-319-06340-9
024	7		_a10.1007/978-3-319-06340-9 _2doi
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
100	1		_aAzambuja, Jos�e Rodrigo. _eauthor.
245	1	0	_aHybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors _h[electronic resource] / _cby Jos�e Rodrigo Azambuja, Fernanda Kastensmidt, J�urgen Becker.
264		1	_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2014.
300			_aXVIII, 94 p. 37 illus., 11 illus. in color. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aIntroduction -- Background -- Fault Tolerance Techniques for Processors -- Proposed Techniques to Detect Transient Faults in Processors -- Simulation Fault Injection Experimental Results -- Configuration Bitstream Fault Injection Experimental Results -- Radiation Experimental Results -- Conclusions and Future Work.
520			_aThis book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors. Coverage begins with an extensive discussion of the current state-of-the-art in fault tolerance techniques. The authors then discuss the best trade-off between software-based and hardware-based techniques and introduce novel hybrid techniques. Proposed techniques increase existing fault detection rates up to 100%, while maintaining low performance overheads in area and application execution time. • Discusses the effects of radiation on modern integrated circuits; • Provides a comprehensive overview of state-of-the art fault tolerance techniques based on software, hardware, and hybrid techniques; • Introduces novel hybrid fault tolerance techniques for reconfigurable FPGAs and ASICs; • Performs fault injection campaigns by simulation, bitstream fault injection, and radiation experiments; • Enables readers to use techniques with lower performance degradation, area occupation, and memory usage.
650		0	_aEngineering.
650		0	_aElectronic circuits.
650		0	_aElectronics.
650		0	_aMicroelectronics.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aElectronic Circuits and Devices.
650	2	4	_aElectronics and Microelectronics, Instrumentation.
700	1		_aKastensmidt, Fernanda. _eauthor.
700	1		_aBecker, J�urgen. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9783319063393
856	4	0	_uhttp://dx.doi.org/10.1007/978-3-319-06340-9
912			_aZDB-2-ENG
942			_cEBK
999			_c52971 _d52971