000			04563nam a22005175i 4500
001			978-3-319-06242-6
003			DE-He213
005			20200421111206.0
007			cr nn 008mamaa
008			140714s2014 gw | s |||| 0|eng d
020			_a9783319062426 _9978-3-319-06242-6
024	7		_a10.1007/978-3-319-06242-6 _2doi
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
100	1		_aVermeulen, Bart. _eauthor.
245	1	0	_aDebugging Systems-on-Chip _h[electronic resource] : _bCommunication-centric and Abstraction-based Techniques / _cby Bart Vermeulen, Kees Goossens.
264		1	_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2014.
300			_aXV, 311 p. 127 illus., 7 illus. in color. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
490	1		_aEmbedded Systems, _x2193-0155
505	0		_aPart I Introduction -- Introduction -- Part II The Complexity of debugging system chips -- Post-silicon debugging of a single building block -- Post-silicon debugging of multiple building blocks -- Part III The CSAR debug approach -- CSAR debug overview -- On-chip debug architecture -- Design-for-Debug flow -- Off-chip debugger software -- Part IV Case studies -- Case studies -- Part V Related work, conclusion, and future work -- Related work -- Conclusion and future work.
520			_aThis book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly.  Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors.  The authors' novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug flow to be used during the design of an SOC, and customizable off-chip debugger software. Coverage includes an evaluation of the efficiency and effectiveness of the CSAR approach and its supporting infrastructure, using six industrial SOCs and an illustrative, example SOC model.  The authors also quantify the hardware cost and design effort to support their approach.   • Describes trends in embedded system design that make the design of SOCs complex and error-prone; • Analyzes four key requirements for debugging a modern, silicon SOC implementation and identifies nine factors that complicate meeting these debug requirements; • Uses communication control for debugging SOCs, which can be used with most on-chip SOC communication protocols in use today; • Uses communication control to (re)create a particular transaction order and demonstrates that this is helpful in the localization of errors in a SOC implementation; • Demonstrates the necessity of extracting locally- and globally-consistent states during SOC debug and guarantees by design that they are so; • Uses a fast and scalable event distribution interconnect, which connects on-chip monitors and protocol specific instruments); • Evaluates benefits and costs of the CSAR approach using six industrial SOC designs and an example SOC model.
650		0	_aEngineering.
650		0	_aMicroprocessors.
650		0	_aElectronics.
650		0	_aMicroelectronics.
650		0	_aElectronic circuits.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aProcessor Architectures.
650	2	4	_aElectronics and Microelectronics, Instrumentation.
700	1		_aGoossens, Kees. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9783319062419
830		0	_aEmbedded Systems, _x2193-0155
856	4	0	_uhttp://dx.doi.org/10.1007/978-3-319-06242-6
912			_aZDB-2-ENG
942			_cEBK
999			_c54152 _d54152