000			03743nam a22005175i 4500
001			978-81-322-2520-1
003			DE-He213
005			20200421111653.0
007			cr nn 008mamaa
008			150706s2016 ii | s |||| 0|eng d
020			_a9788132225201 _9978-81-322-2520-1
024	7		_a10.1007/978-81-322-2520-1 _2doi
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
100	1		_aPalchaudhuri, Ayan. _eauthor.
245	1	0	_aHigh Performance Integer Arithmetic Circuit Design on FPGA _h[electronic resource] : _bArchitecture, Implementation and Design Automation / _cby Ayan Palchaudhuri, Rajat Subhra Chakraborty.
264		1	_aNew Delhi : _bSpringer India : _bImprint: Springer, _c2016.
300			_aXVII, 114 p. 56 illus. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
490	1		_aSpringer Series in Advanced Microelectronics, _x1437-0387 ; _v51
505	0		_aIntroduction -- Architecture of Target FPGA Platform -- A Fabric Component based Design Approach for High Performance Integer Arithmetic Circuits -- Architecture of Data path Circuits -- Architecture of Control path Circuits -- Compact FPGA Implementation of Linear Cellular Automata -- Design Automation and Case Studies -- Conclusions and Future Work.
520			_aThis book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary "User Constraints File". The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students, and professionals engaged in the domain of FPGA circuit optimization and implementation.
650		0	_aEngineering.
650		0	_aLogic design.
650		0	_aElectronics.
650		0	_aMicroelectronics.
650		0	_aElectronic circuits.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aElectronics and Microelectronics, Instrumentation.
650	2	4	_aLogic Design.
700	1		_aChakraborty, Rajat Subhra. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9788132225195
830		0	_aSpringer Series in Advanced Microelectronics, _x1437-0387 ; _v51
856	4	0	_uhttp://dx.doi.org/10.1007/978-81-322-2520-1
912			_aZDB-2-ENG
942			_cEBK
999			_c54518 _d54518