000 03228nam a22005415i 4500
001 978-3-642-45309-0
003 DE-He213
005 20200421111837.0
007 cr nn 008mamaa
008 140509s2014 gw | s |||| 0|eng d
020 _a9783642453090
_9978-3-642-45309-0
024 7 _a10.1007/978-3-642-45309-0
_2doi
050 4 _aTK5102.9
050 4 _aTA1637-1638
050 4 _aTK7882.S65
072 7 _aTTBM
_2bicssc
072 7 _aUYS
_2bicssc
072 7 _aTEC008000
_2bisacsh
072 7 _aCOM073000
_2bisacsh
082 0 4 _a621.382
_223
100 1 _aMeyer-Baese, Uwe.
_eauthor.
245 1 0 _aDigital Signal Processing with Field Programmable Gate Arrays
_h[electronic resource] /
_cby Uwe Meyer-Baese.
250 _a4th ed. 2014.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg :
_bImprint: Springer,
_c2014.
300 _aXXIII, 930 p. 459 illus., 11 illus. in color.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aSignals and Communication Technology,
_x1860-4862
505 0 _aComputer Arithmetic -- Finite Impulse Response (FIR) Digital Filtres -- Infinite Impulse Response (IIR) Digital Filtres -- Multirate Signal Processing -- Fourier Transforms -- Advanced Topics -- Adaptive Filtres -- Microprocessor Design.
520 _aField-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing. The efficient implementation of front-end digital signal processing algorithms is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 40 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, advanced algorithms with high future potential, and adaptive filters. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices. This new edition incorporates Over 10 new system level case studies designed in VHDL and Verilog A new chapter on image and video processing An Altera Quartus update and new ModelSim simulations Xilinx Atlys board and ISIM simulation support Signed fixed point and floating point IEEE library examples An overview on parallel all-pass IIR filter design ICA and PCA system level designs • Speech and audio coding for MP3 and ADPCM.
650 0 _aEngineering.
650 0 _aMicroprogramming.
650 0 _aElectronic circuits.
650 1 4 _aEngineering.
650 2 4 _aSignal, Image and Speech Processing.
650 2 4 _aControl Structures and Microprogramming.
650 2 4 _aCircuits and Systems.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9783642453083
830 0 _aSignals and Communication Technology,
_x1860-4862
856 4 0 _uhttp://dx.doi.org/10.1007/978-3-642-45309-0
912 _aZDB-2-ENG
942 _cEBK
999 _c55361
_d55361