000 03865nam a22005655i 4500
001 978-94-007-7781-1
003 DE-He213
005 20200421111845.0
007 cr nn 008mamaa
008 131113s2014 ne | s |||| 0|eng d
020 _a9789400777811
_9978-94-007-7781-1
024 7 _a10.1007/978-94-007-7781-1
_2doi
050 4 _aTK7867-7867.5
072 7 _aTJFC
_2bicssc
072 7 _aTJFD5
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aZjajo, Amir.
_eauthor.
245 1 0 _aStochastic Process Variation in Deep-Submicron CMOS
_h[electronic resource] :
_bCircuits and Algorithms /
_cby Amir Zjajo.
264 1 _aDordrecht :
_bSpringer Netherlands :
_bImprint: Springer,
_c2014.
300 _aXIX, 192 p. 46 illus.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aSpringer Series in Advanced Microelectronics,
_x1437-0387 ;
_v48
505 0 _a1 Introduction -- 2 Random Process Variation in Deep-Submicron CMOS -- 3 Electronic Noise in Deep-Submicron CMOS -- 4 Thermal Effects in Deep-Submicron CMOS -- 5 Circuit Solutions -- 6 Conclusions and Recommendations -- Appendix. References -- Acknowledgement -- About the Author.
520 _aOne of the most notable features of nanometer scale CMOS technology is the increasing magnitude of variability of the key device parameters affecting performance of integrated circuits. The growth of variability can be attributed to multiple factors, including the difficulty of manufacturing control, the emergence of new systematic variation-generating mechanisms, and most importantly, the increase in atomic-scale randomness, where device operation must be described as a stochastic process. In addition to wide-sense stationary stochastic device variability and temperature variation, existence of non-stationary stochastic electrical noise associated with fundamental processes in integrated-circuit devices represents an elementary limit on the performance of electronic circuits. In an attempt to address these issues, Stochastic Process Variation in Deep-Submicron CMOS: Circuits and Algorithms offers unique combination of mathematical treatment of random process variation, electrical noise and temperature and necessary circuit realizations for on-chip monitoring and performance calibration. The associated problems are addressed at various abstraction levels, i.e. circuit level, architecture level and system level. It therefore provides a broad view on the various solutions that have to be used and their possible combination in very effective complementary techniques for both analog/mixed-signal and digital circuits. The feasibility of the described algorithms and built-in circuitry has been verified by measurements from the silicon prototypes fabricated in standard 90 nm and 65 nm CMOS technology.  .
650 0 _aPhysics.
650 0 _aBiomathematics.
650 0 _aElectronic circuits.
650 0 _aStatistical physics.
650 0 _aDynamical systems.
650 0 _aApplied mathematics.
650 0 _aEngineering mathematics.
650 1 4 _aPhysics.
650 2 4 _aElectronic Circuits and Devices.
650 2 4 _aCircuits and Systems.
650 2 4 _aStatistical Physics, Dynamical Systems and Complexity.
650 2 4 _aAppl.Mathematics/Computational Methods of Engineering.
650 2 4 _aPhysiological, Cellular and Medical Topics.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9789400777804
830 0 _aSpringer Series in Advanced Microelectronics,
_x1437-0387 ;
_v48
856 4 0 _uhttp://dx.doi.org/10.1007/978-94-007-7781-1
912 _aZDB-2-ENG
942 _cEBK
999 _c55786
_d55786