000			03327nam a22005295i 4500
001			978-3-319-04942-7
003			DE-He213
005			20200421112222.0
007			cr nn 008mamaa
008			140321s2014 gw | s |||| 0|eng d
020			_a9783319049427 _9978-3-319-04942-7
024	7		_a10.1007/978-3-319-04942-7 _2doi
050		4	_aTK7888.4
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
082	0	4	_a621.3815 _223
100	1		_aKritikakou, Angeliki. _eauthor.
245	1	0	_aScalable and Near-Optimal Design Space Exploration for Embedded Systems _h[electronic resource] / _cby Angeliki Kritikakou, Francky Catthoor, Costas Goutis.
264		1	_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2014.
300			_aXVII, 277 p. 80 illus., 2 illus. in color. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aIntroduction & Motivation -- Reusable DSE methodology for scalable & near-optimal frameworks -- Part I Background memory management methodologies -- Development of intra-signal in-place methodology -- Pattern representation -- Intra-signal in-place methodology for non-overlapping scenario -- Intra-signal in-place methodology for overlapping scenario -- Part II Processing related mapping methodologies -- Design-time scheduling techniques DSE framework -- Methodology to develop design-time scheduling techniques under constraints -- Design Exploration Methodology for Microprocessor & HW accelerators -- Conclusions & Future Directions.
520			_aThis book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies.  The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems.  Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.   • Describes design space exploration (DSE) methodologies for data storage and processing in embedded systems, which achieve near-optimal solutions with scalable exploration time; • Presents a set of principles and the processes which support the development of the proposed scalable and near-optimal methodologies; • Enables readers to apply scalable and near-optimal methodologies to the intra-signal in-place optimization step for both regular and irregular memory accesses.
650		0	_aEngineering.
650		0	_aEnergy.
650		0	_aMicroprocessors.
650		0	_aElectronics.
650		0	_aMicroelectronics.
650		0	_aElectronic circuits.
650	1	4	_aEngineering.
650	2	4	_aCircuits and Systems.
650	2	4	_aProcessor Architectures.
650	2	4	_aElectronics and Microelectronics, Instrumentation.
650	2	4	_aEnergy, general.
700	1		_aCatthoor, Francky. _eauthor.
700	1		_aGoutis, Costas. _eauthor.
710	2		_aSpringerLink (Online service)
773	0		_tSpringer eBooks
776	0	8	_iPrinted edition: _z9783319049410
856	4	0	_uhttp://dx.doi.org/10.1007/978-3-319-04942-7
912			_aZDB-2-ENG
942			_cEBK
999			_c57485 _d57485