| 000 | 08388nam a2200853 i 4500 | ||
|---|---|---|---|
| 001 | 6497231 | ||
| 003 | IEEE | ||
| 005 | 20200421114528.0 | ||
| 006 | m o d | ||
| 007 | cr |n||||||||| | ||
| 008 | 151222s2013 nju ob 001 eng d | ||
| 020 |
_a9781118569238 _qebook |
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| 020 |
_z9781119979258 _qprint |
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| 020 |
_z9781118569221 _qelectronic |
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| 020 |
_z1118569229 _qelectronic |
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| 020 |
_z1118569237 _qelectronic |
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| 024 | 7 |
_a10.1002/9781118569238 _2doi |
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| 035 | _a(CaBNVSL)mat06497231 | ||
| 035 | _a(IDAMS)0b00006481d2fb08 | ||
| 040 |
_aCaBNVSL _beng _erda _cCaBNVSL _dCaBNVSL |
||
| 050 | 4 |
_aTK7871.99.M44 _bR668 2013eb |
|
| 082 | 0 | 4 |
_a621.3815/9 _223 |
| 100 | 1 |
_aRosa, Jos�ae M. de la, _eauthor. |
|
| 245 | 1 | 0 |
_aCMOS sigma-delta converters : _bpractical design guide / _cJos�ae M. de la Rosa and Roc�aio del R�aio. |
| 264 | 1 |
_aHoboken [New Jersey] : _bWiley-Blackwell, _c2013. |
|
| 264 | 2 |
_a[Piscataqay, New Jersey] : _bIEEE Xplore, _c[2013] |
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| 300 | _a1 PDF (432 pages). | ||
| 336 |
_atext _2rdacontent |
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| 337 |
_aelectronic _2isbdmedia |
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| 338 |
_aonline resource _2rdacarrier |
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| 490 | 1 | _aWiley - IEEE | |
| 504 | _aIncludes bibliographical references. | ||
| 505 | 0 | _aList of Abbreviations xvii -- Preface xxi -- Acknowledgements xxvii -- 1 Introduction to (SVE(B Modulators: Basic Concepts and Fundamentals 1 -- 1.1 Basics of A/D Conversion 2 -- 1.2 Basics of Sigma-Delta Modulators 8 -- 1.3 Classification of (SVE(B Modulators 15 -- 1.4 Single-Loop (SVE(B Modulators 16 -- 1.5 Cascade (SVE(B Modulators 24 -- 1.6 Multibit (SVE(B Modulators 29 -- 1.7 Band-Pass (SVE(B Modulators 36 -- 1.8 Continuous-Time (SVE(B Modulators 41 -- 1.9 Summary 49 -- 2 Circuits and Errors: Systematic Analysis and Practical Design Issues 54 -- 2.1 Nonidealities in Switched-Capacitor (SVE(B Modulators 55 -- 2.2 Finite Amplifier Gain in SC-(SVE(BMs 56 -- 2.3 Capacitor Mismatch in SC-(SVE(BMs 60 -- 2.4 Integrator Settling Error in SC-(SVE(BMs 62 -- 2.5 Circuit Noise in SC-(SVE(BMs 71 -- 2.6 Clock Jitter in SC-(SVE(BMs 75 -- 2.7 Sources of Distortion in SC-(SVE(BMs 76 -- 2.8 Nonidealities in Continuous-Time (SVE(B Modulators 80 -- 2.9 Clock Jitter in CT-(SVE(BMs 81 -- 2.10 Excess Loop Delay in CT-(SVE(BMs 85 -- 2.11 Quantizer Metastability in CT-(SVE(BMs 88 -- 2.12 Finite Amplifier Gain in CT-(SVE(BMs 89 -- 2.13 Time-Constant Error in CT-(SVE(BMs 92 -- 2.14 Finite Integrator Dynamics in CT-(SVE(BMs 94 -- 2.15 Circuit Noise in CT-(SVE(BMs 95 -- 2.16 Sources of Distortion in CT-(SVE(BMs 97 -- 2.17 Case Study: High-Level Sizing of a (SVE(BM 99 -- 2.18 Summary 107 -- 3 Behavioral Modeling and High-Level Simulation 110 -- 3.1 Systematic Design Methodology of (SVE(B Modulators 110 -- 3.2 Simulation Approaches for the High-Level Evaluation of (SVE(BMs 113 -- 3.3 Implementing (SVE(BM Behavioral Models 118 -- 3.4 Efficient Behavioral Modeling of (SVE(BM Building Blocks using C-MEX S-Functions 134 -- 3.5 SIMSIDES: A SIMULINK-Based Behavioral Simulator for (SVE(BMs 159 -- 3.6 Using SIMSIDES for the High-Level Sizing and Verification of (SVE(BMs 167 -- 3.7 Summary 183 -- 4 Circuit-Level Design, Implementation, and Verification 186 -- 4.1 Macromodeling (SVE(BMs 186 -- 4.2 Including Noise in Transient Electrical Simulations of (SVE(BMs 199 -- 4.3 Processing (SVE(BM Output Results of Electrical Simulations 208. | |
| 505 | 8 | _a4.4 Design Considerations and Simulation Test Benches of (SVE(BM Basic Building Blocks 213 -- 4.5 Auxiliary (SVE(BM Building Blocks 250 -- 4.6 Layout Design, Floorplanning, and Practical Issues 257 -- 4.7 Chip Package, Test PCB, and Experimental Set-Up 263 -- 4.8 Summary 270 -- 5 Frontiers of (SVE(B Modulators: Trends and Challenges 273 -- 5.1 Overview of the State of the Art on (SVE(BMs 274 -- 5.2 Empirical and Statistical Analysis of State-of-the-Art (SVE(BMs 291 -- 5.3 Cutting-Edge (SVE(BM Architectures and Techniques 300 -- 5.4 Classification of State-of-the-Art References 319 -- 5.5 Summary 319 -- A SIMSIDES User Guide 334 -- A.1 Getting Started: Installing and Running SIMSIDES 334 -- A.2 Building and Editing (SVE(BM Architectures in SIMSIDES 335 -- A.3 Analyzing (SVE(BMs in SIMSIDES 337 -- A.4 Example 345 -- A.5 Getting Help 354 -- B SIMSIDES Block Libraries and Models 355 -- B.1 Overview of SIMSIDES Libraries 355 -- B.2 Ideal Libraries 355 -- B.3 Real SC Building-Block Libraries 361 -- B.4 Real SI Building-Block Libraries 364 -- B.5 Real CT Building-Block Libraries 371 -- B.6 Real Quantizers and Comparators 382 -- B.7 Real D/A Converters 382 -- B.8 Auxiliary Blocks 384 -- Index 389. | |
| 506 | 1 | _aRestricted to subscribers or individual electronic text purchasers. | |
| 520 | _aThis book offers a timely practical design guide and comprehensive description of Sigma-Delta Modulators ((SV∆(BMs). With emphasis on the most important design issues and the multiple trade-offs involved in the whole design flow from specifications to chip implementation and characterization, it compiles the enormous number of technical and research works reported to date on the topic of (SV∆(BMs, and presents the results of such a compilation in a didactical, pedagogical, and intuitive style. Various design methodologies and practical considerations are described with a top-down approach, presenting from theoretical fundamentals, system-level design equations and behavioral models in MATLAB/SIMULINK, to circuit, transistor-level realization in Cadence Design FrameWork II, and physical implementation, chip prototyping and experimental characterization.Other key features: . a comprehensive and systematic description of (SV∆(BM architectures from the basic operating principles to state-of-the-art advances in architectures and circuits, and considering both switched-capacitor and continuous-time circuit implementations. a detailed review of state-of-the-art (SV∆(BM ICs, extracting statistical and empirical design guidelines, identifying trends, design challenges and solutions. case studies showing the different stages of the design flow of (SV∆(BMs. a complete description of SIMSIDES (SIMulink Sigma-Delta Simulator), a time-domain behavioral simulator for the high-level sizing and verification of (SV∆(BMs, implemented in MATLAB/SIMULINK. a number of electronic resources (available through a companion website) including practical examples using SIMSIDES, the statistical data used in the state-of-the-art survey, as well as many design examples and simulation test benchesUsing a pedagogical and intuitive approach, this is an essential guide for designers of mixed-signal circuits in nanometer CMOS. It doubly serves as a self-contained reference for researchers, designers and non-experienced engineers wanting to acquire an insight into (SV∆(BMs and for undergraduate and graduate students in electronics engineering. | ||
| 530 | _aAlso available in print. | ||
| 538 | _aMode of access: World Wide Web | ||
| 588 | _aDescription based on PDF viewed 12/22/2015. | ||
| 650 | 0 |
_aMetal oxide semiconductors, Complementary _xDesign and construction. |
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| 655 | 0 | _aElectronic books. | |
| 695 | _aAdditive white noise | ||
| 695 | _aApproximation methods | ||
| 695 | _aBandwidth | ||
| 695 | _aCMOS integrated circuits | ||
| 695 | _aCapacitance | ||
| 695 | _aCapacitors | ||
| 695 | _aClocks | ||
| 695 | _aComputational modeling | ||
| 695 | _aComputer architecture | ||
| 695 | _aConferences | ||
| 695 | _aEquivalent circuits | ||
| 695 | _aGain | ||
| 695 | _aIntegrated circuit modeling | ||
| 695 | _aMarket research | ||
| 695 | _aMathematical model | ||
| 695 | _aModulation | ||
| 695 | _aNickel | ||
| 695 | _aNoise | ||
| 695 | _aQuantization (signal) | ||
| 695 | _aSections | ||
| 695 | _aSemiconductor device modeling | ||
| 695 | _aSigma-delta modulation | ||
| 695 | _aSolid state circuits | ||
| 695 | _aSwitches | ||
| 695 | _aTopology | ||
| 695 | _aTransfer functions | ||
| 710 | 2 |
_aIEEE Xplore (Online Service), _edistributor. |
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| 710 | 2 |
_aJohn Wiley & Sons, _epublisher. |
|
| 776 | 0 | 8 |
_iPrint version: _z9781119979258 |
| 830 | 0 | _aWiley - IEEE | |
| 856 | 4 | 2 |
_3Abstract with links to resource _uhttp://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=6497231 |
| 942 | _cEBK | ||
| 999 |
_c59888 _d59888 |
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