000 05046cam a2200577Ii 4500
001 on1008962948
003 OCoLC
005 20220711203418.0
006 m o d
007 cr cnu|||unuuu
008 171102s2017 enk ob 001 0 eng d
040 _aN$T
_beng
_erda
_epn
_cN$T
_dDG1
_dN$T
_dIDEBK
_dEBLCP
_dUAB
_dOCLCF
_dYDX
_dNLE
015 _aGBB7L8677
_2bnb
019 _a1009067879
_a1015357691
020 _a9781119467144
_q(electronic bk.)
020 _a1119467144
_q(electronic bk.)
020 _a9781119467243
_q(electronic bk.)
020 _a1119467241
_q(electronic bk.)
020 _z9781786300942
_q(print)
035 _a(OCoLC)1008962948
_z(OCoLC)1009067879
_z(OCoLC)1015357691
037 _a9781119467144
_bWiley
050 4 _aTA1637
072 7 _aCOM
_x000000
_2bisacsh
082 0 4 _a006.4/2
_223
049 _aMAIN
100 1 _aLi, Chao,
_eauthor.
_97396
245 1 0 _aArchitecture-aware optimization strategies in real-time image processing /
_cChao Li, Souleymane Balla-Arabe, Fan Yang-Song.
264 1 _aLondon, UK :
_bISTE, Ltd. ;
_aHoboken, NJ :
_bWiley,
_c2017.
300 _a1 online resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
504 _aIncludes bibliographical references and index.
588 0 _aOnline resource; title from PDF title page (John Wiley, viewed November 9, 2017).
505 0 _a""Cover""; ""Half-Title Page""; ""Title Page""; ""Copyright Page""; ""Contents""; ""Preface""; ""1. Introduction of Real-time Image Processing""; ""1.1. General image processing presentation""; ""1.2. Real-time image processing""; ""2. Hardware Architectures for Real-time Processing""; ""2.1. History of image processing hardware platforms""; ""2.2. General-purpose processors""; ""2.3. Digital signal processors""; ""2.4. Graphics processing units""; ""2.5. Field programmable gate arrays""; ""2.6. SW/HW codesign of real-time image processing""
505 8 _a""2.7. Image processing development environment description""""2.8. Comparison and discussion""; ""3. Rapid Prototyping of Parallel Reconfigurable Instruction Set Processor for Efficient Real-Time Image Processing""; ""3.1. Context and problematic""; ""3.2. Related works""; ""3.3. Design exploration framework""; ""3.4. Case study: RISP conception and synthesis for spatial transforms""; ""3.4.1. Digital DCT algorithm implementations""; ""3.4.2. Rapid prototyping of DCT RISP conception""; ""3.4.3. RISP simulation and synthesis for 2D-DCT""
505 8 _a""3.5. Hardware implementation of spatial transforms on an FPGA-based platform""""3.6. Discussion and conclusion""; ""4. Exploration of High-level Synthesis Technique""; ""4.1. Introduction of HLS technique""; ""4.2. Vivado_HLS process presentation""; ""4.2.1. Control and datapath extraction""; ""4.2.2. Scheduling and binding""; ""4.3. Case of HLS application: FPGA implementation of an improved skin lesion assessment method""; ""4.3.1. KMGA method description""; ""4.3.2. KMGA method optimization""; ""4.3.3. HCR-KMGA implementation onto FPGA using HLS technique""
505 8 _a""4.3.4. Implementation evaluation experiments""""4.4. Discussion""; ""5. CDMS4HLS: A Novel Source-To-Source Compilation Strategy for HLS-Based FPGA Design""; ""5.1. S2S compiler-based HLS design framework""; ""5.2. CDMS4HLS compilation process description""; ""5.2.1. Function inline""; ""5.2.2. Loop manipulation""; ""5.2.3. Symbolic expression manipulation""; ""5.2.4. Loop unwinding""; ""5.2.5. Memory manipulation""; ""5.3. CDMS4HLS compilation process evaluation""; ""5.3.1. Performances improvement evaluation""; ""5.3.2. Comparison experiment""; ""5.4. Discussion""
505 8 _a""6. Embedded Implementation of VHR Satellite Image Segmentation""""6.1. LSM description""; "" 6.1.1. Background""; ""6.1.2. Level set equation""; ""6.1.3. LBM solver""; ""6.2. Implementation and optimization presentation""; ""6.2.1. Design flow description""; ""6.2.2. Algorithm analysis""; ""6.2.3. Function inline""; ""6.2.4. Loop manipulation""; ""6.2.5. Symbol expression manipulation""; ""6.2.6. Loop unwinding""; ""6.3. Experiment evaluation""; ""6.3.1. Parameter configuration""; ""6.3.2. Function verification""; ""6.3.3. Optimization evaluation""; ""6.3.4. Performance comparison""
506 _aOwing to Legal Deposit regulations this resource may only be accessed from within National Library of Scotland on library computers. For more information contact enquiries@nls.uk.
_5StEdNL
590 _aJohn Wiley and Sons
_bWiley Online Library All Obooks
650 0 _aImage processing
_xDigital techniques.
_94145
650 7 _aCOMPUTERS / General.
_2bisacsh
_95150
650 7 _aImage processing
_xDigital techniques.
_2fast
_0(OCoLC)fst00967508
_94145
655 4 _aElectronic books.
_93294
700 1 _aBalla-Arabe, Souleymane,
_eauthor.
_97397
700 1 _aYang, Fan,
_eauthor.
_97398
856 4 0 _uhttps://doi.org/10.1002/9781119467243
_zWiley Online Library
942 _cEBK
994 _a92
_bDG1
999 _c68875
_d68875