000 04013cam a2200601 i 4500
001 on1125275395
003 OCoLC
005 20220711203546.0
006 m o d
007 cr |||||||||||
008 190618t20202020nju ob 001 0 eng
010 _a 2019025699
040 _aDLC
_beng
_erda
_epn
_cDLC
_dOCLCO
_dEBLCP
_dOCLCF
_dDG1
_dRECBK
_dYDX
_dOCLCQ
_dN$T
020 _a9781118701850
_q(electronic publication)
020 _a1118701852
_q(electronic publication)
020 _a9781118701867
_q(electronic book
_qoBook)
020 _a1118701860
_q(electronic book
_qoBook)
020 _a1118701879
_q(adobe electronic book)
020 _a9781118701874
_q(electronic bk.)
020 _z9781119966340
_q(hardcover)
029 1 _aAU@
_b000066461411
029 1 _aCHNEW
_b001077259
029 1 _aCHVBK
_b582552494
035 _a(OCoLC)1125275395
042 _apcc
050 0 4 _aTK7874
_b.G379 2020
082 0 0 _a621.3815
_223
049 _aMAIN
100 1 _aGaul, Stephen J.,
_d1957-
_eauthor.
_98787
245 1 0 _aIntegrated circuit design for radiation environments /
_cStephen J. Gaul, Nicolaas van Vonno, Steven H. Voldman, Wesley H. Morris.
264 1 _aHoboken, NJ :
_bWiley,
_c2020.
264 4 _c©2020
300 _a1 online resource
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bn
_2rdamedia
338 _aonline resource
_bnc
_2rdacarrier
504 _aIncludes bibliographical references and index.
520 _a"The authors structure the book so that readers can understand the problem of radiation effects first, then understand the skills of layout design and ciruit design after. Chapter One and Chapter Two introduce semiconductors and radiation environments including space, atmospheric and terrestrial environments. Chapter Three details radiation and semiconductor physics. It discusses elementary particle physics so that readers can see how the areas of semiconductors and fundamental interact. Radioactive decay, field equations and transistors are presented in this section too. Damage mechanisms in semiconductors is covered in Chapter Four, including coverage of radiation damage in silicon devices. This leads on logically to single event effects in the next chapter, covering single event upset (SEU), single event gate rupture (SEGR), single event transient (SET), single event latchup (SEL), and radiation techniques. Chapter Six presents radiation-hard semiconductor process and layout techniques, with information on off-the-shelf process technology, and device specific hardening methods. Helpful SEU semiconductor process solutions for SEU are covered in detail in Chapter Seven. Solutions covered include: wells, p-wells, isolation, triple-well, sub-collectors, deep trench and more. Chapter Eight goes into detail on the area of SEU circuit solutions, while Chapter Nine details latchup semiconductor process solutions. Chapter Ten presents Latchup circuit solutions and concluds with a look at emerging effects in future technologies"--
_cProvided by publisher.
588 0 _aOnline resource; title from digital title page (viewed on February 26, 2020).
650 0 _aIntegrated circuits
_xDesign and construction.
_97630
650 0 _aSemiconductors
_xEffect of radiation on.
_98788
650 7 _aTECHNOLOGY & ENGINEERING
_xElectronics
_xCircuits
_xGeneral.
_2bisacsh
_98789
650 7 _aIntegrated circuits
_xDesign and construction.
_2fast
_0(OCoLC)fst00975545
_97630
650 7 _aSemiconductors
_xEffect of radiation on.
_2fast
_0(OCoLC)fst01112217
_98788
655 4 _aElectronic books.
_93294
700 1 _aVonno, Nocolaas van,
_eauthor.
_98790
700 1 _aVoldman, Steven H.,
_eauthor.
_98791
700 1 _aMorris, Wesley H.,
_eauthor.
_98792
776 0 8 _iPrint version:
_aGaul, Stephen J., 1957-
_tIntegrated circuit design for radiation environments.
_dHoboken : Wiley, 2019
_z9781119966340
_w(DLC) 2019025698
856 4 0 _uhttps://doi.org/10.1002/9781118701867
_zWiley Online Library
942 _cEBK
994 _aC0
_bDG1
999 _c69203
_d69203