000 | 03102cam a2200517Ii 4500 | ||
---|---|---|---|
001 | on1288211078 | ||
003 | OCoLC | ||
005 | 20220711203738.0 | ||
006 | m o d | ||
007 | cr cnu---unuuu | ||
008 | 211211s2021 nju o 000 0 eng d | ||
040 |
_aEBLCP _beng _erda _cEBLCP _dIEEEE _dDG1 _dOCLCF _dOCLCO |
||
020 | _a9781119793847 | ||
020 | _a111979384X | ||
020 |
_a9781119793892 _q(electronic bk.) |
||
020 |
_a1119793890 _q(electronic bk.) |
||
020 |
_a9781119793908 _q(electronic bk.) |
||
020 |
_a1119793904 _q(electronic bk.) |
||
024 | 7 |
_a10.1002/9781119793908 _2doi |
|
029 | 1 |
_aAU@ _b000070396088 |
|
035 | _a(OCoLC)1288211078 | ||
037 |
_a9648539 _bIEEE |
||
050 | 4 |
_aTK7870.15 _b.E43 2021 |
|
082 | 0 | 4 |
_a621.381/046 _223 |
049 | _aMAIN | ||
245 | 0 | 0 |
_aEmbedded and fan-out wafer and panel level packaging technologies for advanced application spaces : _bhigh performance compute and system-in-package / _cedited by Beth Keser, Steffen Kröhnert. |
264 | 1 |
_aNewark : _bJohn Wiley & Sons, Incorporated, _c2021. |
|
300 | _a1 online resource (323 pages). | ||
336 |
_atext _btxt _2rdacontent |
||
337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
||
490 | 1 | _aIEEE Press series | |
520 | _aDiscover an up-to-date exploration of Embedded and Fan-Out Waver and Panel Level technologies In Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces: High Performance Compute and System-in-Package , a team of accomplished semiconductor experts delivers an in-depth treatment of various fan-out and embedded die approaches. The book begins with a market analysis of the latest technology trends in Fan-Out and Wafer Level Packaging before moving on to a cost analysis of these solutions. The contributors discuss the new package types for advanced application spaces being created by companies like TSMC, Deca Technologies, and ASE Group. Finally, emerging technologies from academia are explored. Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces is an indispensable resource for microelectronic package engineers, managers, and decision makers working with OEMs and IDMs. It is also a must-read for professors and graduate students working in microelectronics packaging research. | ||
588 | _aDescription based upon print version of record. | ||
590 | _bWiley Frontlist Obook All English 2021 | ||
650 | 0 |
_aMicroelectronic packaging. _94867 |
|
650 | 7 |
_aMicroelectronic packaging. _2fast _0(OCoLC)fst01019751 _94867 |
|
655 | 4 |
_aElectronic books. _93294 |
|
700 | 1 |
_aKeser, Beth, _d1971- _eeditor. _910501 |
|
700 | 1 |
_aKröhnert, Steffen, _eeditor. _910502 |
|
776 | 0 | 8 |
_iPrint version: _aKeser, Beth _tEmbedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces _dNewark : John Wiley & Sons, Incorporated,c2021 _z9781119793779 |
830 | 0 |
_aIEEE Press series. _910503 |
|
856 | 4 | 0 |
_uhttps://doi.org/10.1002/9781119793908 _zWiley Online Library |
942 | _cEBK | ||
994 |
_a92 _bDG1 |
||
999 |
_c69731 _d69731 |