000 04278cam a22005898i 4500
001 on1252736079
003 OCoLC
005 20220711203745.0
006 m o d
007 cr |||||||||||
008 210511s2022 nju ob 001 0 eng
010 _a 2021020791
040 _aDLC
_beng
_erda
_cDLC
_dOCLCO
_dOCLCF
_dORMDA
_dDG1
_dOCLCO
020 _a9781119778097
_q(ebook)
020 _a1119778093
020 _a9781119778066
_q(pdf)
020 _a1119778069
020 _a9781119778080
_q(epub)
020 _a1119778085
020 _z9781119778042
_q(hardback)
029 1 _aAU@
_b000069270918
035 _a(OCoLC)1252736079
037 _a9781119778042
_bO'Reilly Media
042 _apcc
050 0 0 _aTK7874.75
082 0 0 _a621.39/5028553
_223
049 _aMAIN
100 1 _aTripathi, Suman Lata,
_eauthor.
_910609
245 1 0 _aDigital VLSI design and simulation with Verilog /
_cSuman Lata Tripathi, Sobhit Saxena, Sanjeet Kumar Sinha, Govind Singh Patel.
263 _a2110
264 1 _aHoboken, NJ :
_bJohn Wiley & Sons,
_c2022.
300 _a1 online resource
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
504 _aIncludes bibliographical references and index.
520 _a"The integrated circuits are now growing its importance in every electronic system that needs an efficient VLSI architecture designs with low power consumption, compress chip area, speed, and operating frequency. The challenge for VLSI system designers is to optimize the hardware-software integration for lowering the total cost of acquisition of products. So, there is a demand for better technological solutions for advanced VLSI architectures that can be done through hardware description language (HDL). Verilog HDL is one of the programming languages that can give better solutions to this new era of the VLSI industry. The prefabrication design and analysis of such advanced VLSI architecture can be easily implemented with Verilog HDL with the available software tools like Xilinx and Cadence. The presented book mainly deals with fundamental concepts of digital design along with their design verification with Verilog HDL. The book will be a common source of knowledge for the beginners as well as research seeking students working in the area of VLSI design covering fundamentals of digital design from switch level to FPGA based implementation using hardware description language (HDL). The book is summarized in 10 chapters. Chapter 1 and 2 describes the fundamental concepts behind digital circuit design including combinational and sequential circuit design. Chapter 3 to chapter 8 is focused on sequential and combinational circuit design using Verilog HDL at a different level of abstractions in Verilog coding. Chapter 9 includes implementation of any logic function using a programmable logic device like PLD, CPLD or FPGA, etc. Chapter 10 covers a few real-time examples of digital circuit design using Verilog. Chapter 11 focuses on System Verilog, distinct features, computing Verilog and System Verilog with design example."--
_cProvided by publisher.
588 _aDescription based on print version record and CIP data provided by publisher; resource not viewed.
650 0 _aIntegrated circuits
_xVery large scale integration
_xDesign and construction.
_910610
650 0 _aVerilog (Computer hardware description language)
_910611
650 6 _aVerilog (Langage de description de matériel informatique)
_0(CaQQLa)201-0328861
_910612
650 7 _aIntegrated circuits
_xVery large scale integration
_xDesign and construction.
_2fast
_0(OCoLC)fst00975610
_910610
650 7 _aVerilog (Computer hardware description language)
_2fast
_0(OCoLC)fst01165388
_910611
655 4 _aElectronic books.
_93294
700 1 _aSaxena, Sobhit,
_eauthor.
_910613
700 1 _aSinha, Sanjeet Kumar,
_eauthor.
_910614
700 1 _aPatel, Govind Singh,
_eauthor.
_910615
776 0 8 _iPrint version:
_aTripathi, Suman Lata.
_tDigital VLSI design and simulation with Verilog
_dHoboken, NJ : John Wiley & Sons, 2022
_z9781119778042
_w(DLC) 2021020790
856 4 0 _uhttps://doi.org/10.1002/9781119778097
_zWiley Online Library
942 _cEBK
994 _aC0
_bDG1
999 _c69762
_d69762