000			02813cam a2200349Ii 4500
001			9781420007947
008			180706s2006 flua ob 001 0 eng d
020			_a9781420007947 _q(e-book : PDF)
020			_a9781315221700 _q(e-book)
020			_a9781351828901 _q(e-book: Mobi)
020			_z9780849379239 _q(hardback)
024	7		_a10.1201/9781420007947 _2doi
035			_a(OCoLC)759861255
050		4	_aTK7874 _b.E26 2006
082	0	4	_a621.3815 _bE211
245	0	0	_aEDA for IC system design, verification, and testing / _cedited by Louis Scheffer, Luciano Lavagno, Grant Martin.
246	3		_aElectronic design automation for integrated circuit system design, verification, and testing
264		1	_aBoca Raton, FL : _bCRC Taylor & Francis, _c2006.
300			_a1 online resource (544 pages).
490	0		_aElectronic design automation for integrated circuits handbook
500			_aCompanion volume of: EDA for IC implementation, circuit design, and process technology.
505	0		_achapter 1 Overview -- chapter 2 The Integrated Circuit Design Process and Electronic Design Automation -- chapter 3 Tools and Methodologies for System-Level Design -- chapter 4 System-Level Specification and Modeling Languages -- chapter 5 SoC Block-Based Design and IP Assembly -- chapter 6 Performance Evaluation Methods for Multiprocessor System-on-Chip Design -- chapter 7 System-Level Power Management -- chapter 8 Processor Modeling and Design Tools -- chapter 9 Embedded Software Modeling and Design -- chapter 10 Using Performance Metrics to Select Microprocessor Cores for IC Designs -- chapter 11 Parallelizing High-Level Synthesis: A Code Transformational Approach to High-Level Synthesis -- chapter 12 Cycle-Accurate System-Level Modeling and Performance Evaluation -- chapter 13 Micro-Architectural Power Estimation and Optimization -- chapter 14 Design Planning -- chapter 15 Design and Verification Languages -- chapter 16 Digital Simulation -- chapter 17 Using Transactional-Level Models in an SoC Design Flow -- chapter 18 Assertion-Based Verification -- chapter 19 Hardware Acceleration and Emulation -- chapter 20 Formal Property Verification -- chapter 21 Design-For-Test -- chapter 22 Automatic Test Pattern Generation -- chapter 23 Analog and Mixed Signal Test.
650		0	_aIntegrated circuits _xComputer-aided design. _99154
650		0	_aIntegrated circuits _xVerification _xData processing. _917627
700	1		_aLavagno, Luciano, _d1959- _917628
700	1		_aMartin, Grant _q(Grant Edmund) _917629
700	1		_aScheffer, Louis Kossuth. _917630
730	0		_aEDA for IC implementation, circuit design, and process technology. _917631
776	0	8	_iPrint version: _z9780849379239
856	4	0	_uhttps://www.taylorfrancis.com/books/9781420007947 _zClick here to view.
942			_cEBK
999			_c71590 _d71590