| 000 | 01982cam a2200361Ii 4500 | ||
|---|---|---|---|
| 001 | 9781315219752 | ||
| 008 | 180331s2009 flua ob 001 0 eng d | ||
| 020 |
_a9781315219752 _q(e-book : PDF) |
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| 020 |
_a9781315219752 _q(e-book) |
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| 020 |
_a9781351826952 _q(e-book: Mobi) |
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| 020 |
_z9781420048018 _q(hardback) |
||
| 020 |
_z9781138114173 _q(paperback) |
||
| 024 | 7 |
_a10.1201/9781420048025 _2doi |
|
| 035 | _a(OCoLC)341046328 | ||
| 050 | 4 |
_aTK7895.E42 _bS65 2009 |
|
| 082 | 0 | 4 |
_a004.16 _bS774 |
| 100 | 1 |
_aSriram, Sundararajan, _d1968, _eauthor. _920023 |
|
| 245 | 1 | 0 |
_aEmbedded multiprocessors : _bscheduling and synchronization / _cauthors, Sundararajan Sriram, Shuvra S. Bhattacharyya. |
| 250 | _aSecond edition. | ||
| 264 | 1 |
_aBoca Raton : _bTaylor & Francis, _c2009. |
|
| 300 | _a1 online resource (xxii, 361 pages) | ||
| 500 | _aA CRC title. | ||
| 505 | 0 | _achapter 1 INTRODUCTION -- chapter 2 APPLICATION-SPECIFIC MULTIPROCESSORS -- chapter 3 BACKGROUND TERMINOLOGY AND NOTATION -- chapter 4 DSP-ORIENTED DATAFLOW MODELS OF COMPUTATION -- chapter 5 MULTIPROCESSOR SCHEDULING MODELS -- chapter 6 IPC-CONSCIOUS SCHEDULING ALGORITHMS -- chapter 7 THE ORDERED-TRANSACTIONS STRATEGY -- chapter 8 ANALYSIS OF THE ORDERED-TRANSACTIONS STRATEGY -- chapter 9 EXTENDING THE OMA ARCHITECTURE -- chapter 10 SYNCHRONIZATION IN SELF-TIMED SYSTEMS -- chapter 11 RESYNCHRONIZATION -- chapter 12 LATENCY-CONSTRAINED RESYNCHRONIZATION -- chapter 13 INTEGRATED SYNCHRONIZATION OPTIMIZATION -- chapter 14 FUTURE RESEARCH DIRECTIONS. | |
| 650 | 0 |
_aEmbedded computer systems. _97792 |
|
| 650 | 0 |
_aMultiprocessors. _96677 |
|
| 650 | 0 |
_aScheduling. _920024 |
|
| 650 | 0 |
_aMultimedia systems. _911575 |
|
| 650 | 0 |
_aMemory management (Computer science) _920025 |
|
| 700 | 1 |
_aBhattacharyya, Shuvra S., _d1968- _915943 |
|
| 776 | 0 | 8 |
_iPrint version: _z9781420048018 _w(DLC) 2008050949 |
| 856 | 4 | 0 |
_uhttps://www.taylorfrancis.com/books/9781420048025 _zClick here to view. |
| 942 | _cEBK | ||
| 999 |
_c72262 _d72262 |
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