000 | 05299nam a2201009 i 4500 | ||
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001 | 5265097 | ||
003 | IEEE | ||
005 | 20220712205654.0 | ||
006 | m o d | ||
007 | cr |n||||||||| | ||
008 | 100317t20151999njua ob 001 0 eng d | ||
020 |
_a9780470544921 _qelectronic |
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020 |
_z9780780334472 _qprint |
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020 |
_z0470544929 _qelectronic |
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024 | 7 |
_a10.1109/9780470544921 _2doi |
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035 | _a(CaBNVSL)mat05265097 | ||
035 | _a(IDAMS)0b000064810c4c2f | ||
040 |
_aCaBNVSL _beng _erda _cCaBNVSL _dCaBNVSL |
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050 | 4 |
_aTK7874 _b.I4713 1998eb |
|
082 | 0 | 4 |
_a621.3815 _222 |
245 | 0 | 0 |
_aIntegrated circuit manufacturability : _bthe art of process and design integration / _cedited by Jos�e Pineda de Gyvez, Dhiraj Pradhan. |
264 | 1 |
_aPiscataway, New Jersey : _bIEEE Press, _cc1999. |
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264 | 2 |
_a[Piscataqay, New Jersey] : _bIEEE Xplore, _c[1998] |
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300 |
_a1 PDF (xv, 316 pages) : _billustrations. |
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336 |
_atext _2rdacontent |
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337 |
_aelectronic _2isbdmedia |
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338 |
_aonline resource _2rdacarrier |
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500 | _a"IEEE Circuits and Systems Society, sponsor." | ||
504 | _aIncludes bibliographical references and index. | ||
505 | 0 | _aPreface. Introduction (Jose Pineda de Gyvez). Defect Monitoring and Characterization (Eric Bruls). Digital CMOS Fault Modeling and Inductive Fault Analysis (Manoj Sachdev). Functional Yield Modeling (Gary C. Cheek and Geoff O'Donoghue). Critical Area and Fault Probability Prediction (D.M.H. Walker). Statistical Methods of Parametric Yield and Quality Enhancement (Maciej Styblinski). Architectural Fault Tolerance (S.K. Tewksbury). Design for Test and Manufacturability (Dhiraj Pradhan and Adit Singh). Testing Solutions for MCM Manufacturing (Yervant Zorian). Index. About the Editors. | |
506 | 1 | _aRestricted to subscribers or individual electronic text purchasers. | |
520 | _a"INTEGRATED CIRCUIT MANUFACTURABILITY provides comprehensive coverage of the process and design variables that determine the ease and feasibility of fabrication (or manufacturability) of contemporary VLSI systems and circuits. This book progresses from semiconductor processing to electrical design to system architecture. The material provides a theoretical background as well as case studies, examining the entire design for the manufacturing path from circuit to silicon. Each chapter includes tutorial and practical applications coverage. INTEGRATED CIRCUIT MANUFACTURABILITY illustrates the implications of manufacturability at every level of abstraction, including the effects of defects on the layout, their mapping to electrical faults, and the corresponding approaches to detect such faults. The reader will be introduced to key practical issues normally applied in industry and usually required by quality, product, and design engineering departments in today's design practices: * Yield management strategies * Effects of spot defects * Inductive fault analysis and testing * Fault-tolerant architectures and MCM testing strategies. This book will serve design and product engineers both from academia and industry. It can also be used as a reference or textbook for introductory graduate-level courses on manufacturing.". | ||
530 | _aAlso available in print. | ||
538 | _aMode of access: World Wide Web | ||
588 | _aDescription based on PDF viewed 12/21/2015. | ||
650 | 0 |
_aIntegrated circuits _xComputer-aided design. _99154 |
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650 | 0 |
_aMetal oxide semiconductors, Complementary _xComputer-aided design. _926722 |
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650 | 0 |
_aIntegrated circuits _xTesting. _926921 |
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655 | 0 |
_aElectronic books. _93294 |
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695 | _aDelay | ||
695 | _aDigital signal processing | ||
695 | _aFault tolerance | ||
695 | _aFault tolerant systems | ||
695 | _aIndexes | ||
695 | _aIntegrated circuit modeling | ||
695 | _aIntegrated circuits | ||
695 | _aLayout | ||
695 | _aLithography | ||
695 | _aLogic gates | ||
695 | _aMaintenance engineering | ||
695 | _aManufacturing | ||
695 | _aManufacturing processes | ||
695 | _aMaterials | ||
695 | _aMathematical model | ||
695 | _aMetals | ||
695 | _aMobile communication | ||
695 | _aMonitoring | ||
695 | _aProbes | ||
695 | _aProduction | ||
695 | _aRLC circuits | ||
695 | _aRandom variables | ||
695 | _aReliability | ||
695 | _aSections | ||
695 | _aSemiconductor device modeling | ||
695 | _aSolid modeling | ||
695 | _aStatistical analysis | ||
695 | _aSubstrates | ||
695 | _aTesting | ||
695 | _aVery large scale integration | ||
695 | _aAssembly | ||
695 | _aAtmospheric modeling | ||
695 | _aBiographies | ||
695 | _aCMOS integrated circuits | ||
695 | _aCircuit faults | ||
695 | _aCircuit optimization | ||
695 | _aCircuit synthesis | ||
695 | _aComputational modeling | ||
695 | _aContamination | ||
700 | 1 |
_aPradhan, Dhiraj K. _926922 |
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700 | 1 |
_aPineda de Gyvez, Jos�e. _926923 |
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710 | 2 |
_aJohn Wiley & Sons, _epublisher. _96902 |
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710 | 2 |
_aIEEE Circuits and Systems Society. _926924 |
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710 | 2 |
_aIEEE Xplore (Online service), _edistributor. _926925 |
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776 | 0 | 8 |
_iPrint version: _z9780780334472 |
856 | 4 | 2 |
_3Abstract with links to resource _uhttps://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5265097 |
942 | _cEBK | ||
999 |
_c73915 _d73915 |