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001 978-3-030-57682-0
003 DE-He213
005 20220801213844.0
007 cr nn 008mamaa
008 201027s2021 sz | s |||| 0|eng d
020 _a9783030576820
_9978-3-030-57682-0
024 7 _a10.1007/978-3-030-57682-0
_2doi
050 4 _aTK7867-7867.5
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
072 7 _aTJFC
_2thema
082 0 4 _a621.3815
_223
100 1 _aSoni, Deepraj.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_934810
245 1 0 _aHardware Architectures for Post-Quantum Digital Signature Schemes
_h[electronic resource] /
_cby Deepraj Soni, Kanad Basu, Mohammed Nabeel, Najwa Aaraj, Marc Manzano, Ramesh Karri.
250 _a1st ed. 2021.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2021.
300 _aXXII, 170 p. 68 illus., 66 illus. in color.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _aIntroduction -- qTESLA -- CRYSTALS –Dilithium -- MQDSS -- SPHINCS -- Luov -- Falcon -- Picnic -- GeMSS -- Power, Performance, Area, and Security (PPAS) Comparison of the PQC Algorithms -- Conclusions.
520 _aThis book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification. The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs. Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based; Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms; Enables designers to build hardware implementations that are resilient to a variety of side-channels.
650 0 _aElectronic circuits.
_919581
650 0 _aCooperating objects (Computer systems).
_96195
650 0 _aMicroprocessors.
_934811
650 0 _aComputer architecture.
_93513
650 1 4 _aElectronic Circuits and Systems.
_934812
650 2 4 _aCyber-Physical Systems.
_932475
650 2 4 _aProcessor Architectures.
_934813
700 1 _aBasu, Kanad.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_934814
700 1 _aNabeel, Mohammed.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_934815
700 1 _aAaraj, Najwa.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_934816
700 1 _aManzano, Marc.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_934817
700 1 _aKarri, Ramesh.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_934818
710 2 _aSpringerLink (Online service)
_934819
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783030576813
776 0 8 _iPrinted edition:
_z9783030576837
776 0 8 _iPrinted edition:
_z9783030576844
856 4 0 _uhttps://doi.org/10.1007/978-3-030-57682-0
912 _aZDB-2-ENG
912 _aZDB-2-SXE
942 _cEBK
999 _c75676
_d75676