000			03419nam a22005535i 4500
001			978-981-13-2493-2
003			DE-He213
005			20220801214323.0
007			cr nn 008mamaa
008			180920s2019 si | s |||| 0|eng d
020			_a9789811324932 _9978-981-13-2493-2
024	7		_a10.1007/978-981-13-2493-2 _2doi
050		4	_aTK7867-7867.5
072		7	_aTJFC _2bicssc
072		7	_aTEC008010 _2bisacsh
072		7	_aTJFC _2thema
082	0	4	_a621.3815 _223
100	1		_aJayanthy, S. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _937668
245	1	0	_aTest Generation of Crosstalk Delay Faults in VLSI Circuits _h[electronic resource] / _cby S. Jayanthy, M.C. Bhuvaneswari.
250			_a1st ed. 2019.
264		1	_aSingapore : _bSpringer Nature Singapore : _bImprint: Springer, _c2019.
300			_aXI, 156 p. 49 illus., 7 illus. in color. _bonline resource.
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
347			_atext file _bPDF _2rda
505	0		_aChapter 1. Background and Review of Crosstalk Delay Fault Models and the Crosstalk Effects -- Chapter 2. Review of Test Generation Techniques for Crosstalk Delay Faults -- Chapter 3. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults Using Modified PODEM and FAN Algorithm -- Chapter 4. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults using Single-Objective Genetic Algorithm -- Chapter 5. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults Using Single-Objective Particle Swarm Optimization -- Chapter 6. Simulation of Asynchronous Sequential Circuits using Fuzzy Delay Model -- Chapter 7. Simulation Based Test Generation for Crosstalk Delay Faults in Asynchronous Sequential Circuits.
520			_aThis book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.
650		0	_aElectronic circuits. _919581
650		0	_aMicroprogramming . _932081
650		0	_aComputers. _98172
650		0	_aLogic design. _93686
650	1	4	_aElectronic Circuits and Systems. _937669
650	2	4	_aControl Structures and Microprogramming. _932083
650	2	4	_aHardware Performance and Reliability. _932357
650	2	4	_aLogic Design. _93686
700	1		_aBhuvaneswari, M.C. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _937670
710	2		_aSpringerLink (Online service) _937671
773	0		_tSpringer Nature eBook
776	0	8	_iPrinted edition: _z9789811324925
776	0	8	_iPrinted edition: _z9789811324949
776	0	8	_iPrinted edition: _z9789811347849
856	4	0	_uhttps://doi.org/10.1007/978-981-13-2493-2
912			_aZDB-2-ENG
912			_aZDB-2-SXE
942			_cEBK
999			_c76215 _d76215