000 03584nam a22005415i 4500
001 978-3-030-10958-5
003 DE-He213
005 20220801214659.0
007 cr nn 008mamaa
008 190130s2019 sz | s |||| 0|eng d
020 _a9783030109585
_9978-3-030-10958-5
024 7 _a10.1007/978-3-030-10958-5
_2doi
050 4 _aTK7867-7867.5
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
072 7 _aTJFC
_2thema
082 0 4 _a621.3815
_223
100 1 _aMarkulic, Nereo.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_939796
245 1 0 _aDigital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission
_h[electronic resource] /
_cby Nereo Markulic, Kuba Raczkowski, Jan Craninckx, Piet Wambacq.
250 _a1st ed. 2019.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2019.
300 _aXXIII, 138 p. 97 illus., 23 illus. in color.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aAnalog Circuits and Signal Processing,
_x2197-1854
505 0 _aChapter 1. Introduction -- Chapter 2. A Digital-to-Time Converter based Subsampling PLL for Fractional Synthesis -- Chapter 3. A Background-Calibrated Subsampling PLL for Phase/Frequency Modulation -- Chapter 4. A Background-Calibrated Digital Subsampling Polar Transmitter -- Chapter 5. Conclusion and Future Outlook.
520 _aThis book explains concepts behind fractional subsampling-based frequency synthesis that is re-shaping today’s art in the field of low-noise LO generation. It covers advanced material, giving clear guidance for development of background-calibrated environments capable of spur-free synthesis and wideband phase modulation. It further expands the concepts into the field of subsampling polar transmission, where the newly developed architecture enables unprecedented spectral efficiency levels, unquestionably required by the upcoming generation of wireless standards. Guides development of DTC-based Fractional-N Subsampling PLL and Subsampling Polar Transmitters, covering material from fundamental theory, over system level considerations to building block IC implementation; Describes a fully background-calibrated environment that can used in general context of fractional frequency synthesis and/or phase/frequency modulation; Presents three IC implementations, showing system level analysis, design methodology, circuit details and measurement results.
650 0 _aElectronic circuits.
_919581
650 0 _aElectronics.
_93425
650 1 4 _aElectronic Circuits and Systems.
_939797
650 2 4 _aElectronics and Microelectronics, Instrumentation.
_932249
700 1 _aRaczkowski, Kuba.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_939798
700 1 _aCraninckx, Jan.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_939799
700 1 _aWambacq, Piet.
_eauthor.
_4aut
_4http://id.loc.gov/vocabulary/relators/aut
_939800
710 2 _aSpringerLink (Online service)
_939801
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783030109578
776 0 8 _iPrinted edition:
_z9783030109592
830 0 _aAnalog Circuits and Signal Processing,
_x2197-1854
_939802
856 4 0 _uhttps://doi.org/10.1007/978-3-030-10958-5
912 _aZDB-2-ENG
912 _aZDB-2-SXE
942 _cEBK
999 _c76624
_d76624