000 | 03366nam a22005295i 4500 | ||
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001 | 978-3-030-12485-4 | ||
003 | DE-He213 | ||
005 | 20220801215227.0 | ||
007 | cr nn 008mamaa | ||
008 | 190327s2019 sz | s |||| 0|eng d | ||
020 |
_a9783030124854 _9978-3-030-12485-4 |
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024 | 7 |
_a10.1007/978-3-030-12485-4 _2doi |
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050 | 4 | _aTK7867-7867.5 | |
072 | 7 |
_aTJFC _2bicssc |
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_aTEC008010 _2bisacsh |
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072 | 7 |
_aTJFC _2thema |
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082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aReyserhove, Hans. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _943118 |
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245 | 1 | 0 |
_aEfficient Design of Variation-Resilient Ultra-Low Energy Digital Processors _h[electronic resource] / _cby Hans Reyserhove, Wim Dehaene. |
250 | _a1st ed. 2019. | ||
264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2019. |
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300 |
_aXXIV, 209 p. 141 illus., 80 illus. in color. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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_atext file _bPDF _2rda |
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505 | 0 | _aChapter 1. Energy-Efficient Processors: Challenges and Solutions -- Chapter 2. Near-Threshold Operation: Technology, Building Blocks and Architecture -- Chapter 3. Efficient VLSI Design Flow -- Chapter 4. Ultra-Low Voltage Microcontrollers -- Chapter 5. Error Detection and Correction -- Chapter 6. Timing Error-Aware Microcontroller -- Chapter 7. Conclusion. | |
520 | _aThis book enables readers to achieve ultra-low energy digital system performance. The author’s main focus is the energy consumption of microcontroller architectures in digital (sub)-systems. The book covers a broad range of topics extensively: from circuits through design strategy to system architectures. The result is a set of techniques and a context to realize minimum energy digital systems. Several prototype silicon implementations are discussed, which put the proposed techniques to the test. The achieved results demonstrate an extraordinary combination of variation-resilience, high speed performance and ultra-low energy. Presents a full bottom-up micro-electronics approach: circuit-level, design strategy and CAD automation, architecture optimization Motivates discussion with simulation results and/or measurements in an advanced nanometer CMOS process Compares traditional circuit/design/architecture techniques and state-of-the-art, setting the landscape of current best performance and how it can be improved. | ||
650 | 0 |
_aElectronic circuits. _919581 |
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650 | 0 |
_aSignal processing. _94052 |
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650 | 0 |
_aElectronics. _93425 |
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650 | 1 | 4 |
_aElectronic Circuits and Systems. _943119 |
650 | 2 | 4 |
_aSignal, Speech and Image Processing . _931566 |
650 | 2 | 4 |
_aElectronics and Microelectronics, Instrumentation. _932249 |
700 | 1 |
_aDehaene, Wim. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _943120 |
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710 | 2 |
_aSpringerLink (Online service) _943121 |
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773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783030124847 |
776 | 0 | 8 |
_iPrinted edition: _z9783030124861 |
776 | 0 | 8 |
_iPrinted edition: _z9783030124878 |
856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-030-12485-4 |
912 | _aZDB-2-ENG | ||
912 | _aZDB-2-SXE | ||
942 | _cEBK | ||
999 |
_c77254 _d77254 |