000 | 03474nam a22005415i 4500 | ||
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001 | 978-3-319-62012-1 | ||
003 | DE-He213 | ||
005 | 20220801221110.0 | ||
007 | cr nn 008mamaa | ||
008 | 170802s2018 sz | s |||| 0|eng d | ||
020 |
_a9783319620121 _9978-3-319-62012-1 |
||
024 | 7 |
_a10.1007/978-3-319-62012-1 _2doi |
|
050 | 4 | _aTK7867-7867.5 | |
072 | 7 |
_aTJFC _2bicssc |
|
072 | 7 |
_aTEC008010 _2bisacsh |
|
072 | 7 |
_aTJFC _2thema |
|
082 | 0 | 4 |
_a621.3815 _223 |
100 | 1 |
_aLi, Weitao. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _954116 |
|
245 | 1 | 0 |
_aHigh-Resolution and High-Speed Integrated CMOS AD Converters for Low-Power Applications _h[electronic resource] / _cby Weitao Li, Fule Li, Zhihua Wang. |
250 | _a1st ed. 2018. | ||
264 | 1 |
_aCham : _bSpringer International Publishing : _bImprint: Springer, _c2018. |
|
300 |
_aXIV, 171 p. 141 illus., 56 illus. in color. _bonline resource. |
||
336 |
_atext _btxt _2rdacontent |
||
337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
||
347 |
_atext file _bPDF _2rda |
||
490 | 1 |
_aAnalog Circuits and Signal Processing, _x2197-1854 |
|
505 | 0 | _aIntroduction -- ADC Architecture -- Reference Voltage Buffer -- Amplification -- Comparator -- Calibration -- Design Case -- Contributions and Future Directions. | |
520 | _aThis book is a step-by-step tutorial on how to design a low-power, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) integrated CMOS analog-to-digital (AD) converter, to respond to the challenge from the rapid growth of IoT. The discussion includes design techniques on both the system level and the circuit block level. In the architecture level, the power-efficient pipelined AD converter, the hybrid AD converter and the time-interleaved AD converter are described. In the circuit block level, the reference voltage buffer, the opamp, the comparator, and the calibration are presented. Readers designing low-power and high-performance AD converters won’t want to miss this invaluable reference. Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter; Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter; Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance. | ||
650 | 0 |
_aElectronic circuits. _919581 |
|
650 | 0 |
_aElectronics. _93425 |
|
650 | 1 | 4 |
_aElectronic Circuits and Systems. _954117 |
650 | 2 | 4 |
_aElectronics and Microelectronics, Instrumentation. _932249 |
700 | 1 |
_aLi, Fule. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _954118 |
|
700 | 1 |
_aWang, Zhihua. _eauthor. _4aut _4http://id.loc.gov/vocabulary/relators/aut _954119 |
|
710 | 2 |
_aSpringerLink (Online service) _954120 |
|
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783319620114 |
776 | 0 | 8 |
_iPrinted edition: _z9783319620138 |
776 | 0 | 8 |
_iPrinted edition: _z9783319872131 |
830 | 0 |
_aAnalog Circuits and Signal Processing, _x2197-1854 _954121 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-319-62012-1 |
912 | _aZDB-2-ENG | ||
912 | _aZDB-2-SXE | ||
942 | _cEBK | ||
999 |
_c79291 _d79291 |